*
This commit is contained in:
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# ili9325
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ILI9325 LCD controller C++ driver
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@@ -0,0 +1,194 @@
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/*
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* ili9325.h
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*
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* Created on: 23 îêò. 2016 ã.
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* Author: l-pro
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*/
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#ifndef ILI9325_DRIVER_H_
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#define ILI9325_DRIVER_H_
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#include "ili9325_registers.h"
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namespace Ili9325 {
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template<typename HardwareInterface>
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class Driver {
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public:
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typedef HardwareInterface HW;
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enum class FrameRate : uint8_t{
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fr40 = 0,
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fr43,
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fr45,
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fr48,
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fr51,
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fr55,
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fr59,
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fr64,
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fr70,
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fr77,
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fr85,
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fr96, //(default)
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fr110,
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fr128
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};
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struct GammaCurve {
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uint16_t v[10];
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};
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static void write(uint16_t address, uint16_t data){
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HW::setAddress(address);
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HW::write(data);
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}
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static uint16_t read(uint16_t address, uint16_t data){
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HW::setAddress(address);
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return HW::read();
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}
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static void init(){
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HW::reset();
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write(Reg::DriverOutputControl::Address, Reg::DriverOutputControl::SS);
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write(Reg::LcdDrivingControl::Address, Reg::LcdDrivingControl::BC0 | Reg::LcdDrivingControl::EOR); /* set 1 line inversion */
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setOrientation(0);
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write(Reg::ResizeControl::Address, 0); //Disable resizing
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setBackAndFrontPorch(2, 2);
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write(Reg::DisplayControl3::Address, 0); //Set non-display area refresh cycle ISC[3:0]
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write(Reg::DisplayControl4::Address, 0); //FMARK function
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write(Reg::RgbDisplayInterfaceControl1::Address, 0); // RGB interface setting
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write(Reg::FrameMarkerPosition::Address, 0); //Frame marker Position
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write(Reg::RgbDisplayInterfaceControl2::Address, 0); // RGB interface polarity
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//Power On
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write(Reg::PowerControl1::Address, 0); // SAP, BT[3:0], AP, DSTB, SLP, STB
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write(Reg::PowerControl2::Address, REG_SET(Reg::PowerControl2, VC, 7));
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write(Reg::PowerControl3::Address, 0); // VREG1OUT voltage
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write(Reg::PowerControl4::Address, 0); // VDV[4:0] for VCOM amplitude
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write(Reg::DisplayControl1::Address, Reg::DisplayControl1::D0);
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HAL_Delay(200);
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// Dis-charge capacitor power voltage
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write(Reg::PowerControl1::Address, REG_SET(Reg::PowerControl1, AP, 1) | Reg::PowerControl1::APE | Reg::PowerControl1::SAP);
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write(Reg::PowerControl2::Address,
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REG_SET(Reg::PowerControl2, VC, 7) |
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REG_SET(Reg::PowerControl2, DC0, 2) |
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REG_SET(Reg::PowerControl2, DC1, 2));
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HAL_Delay(50);
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write(Reg::PowerControl3::Address, REG_SET(Reg::PowerControl3, VRH, 0xf) | Reg::PowerControl3::PON);
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HAL_Delay(50);
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write(Reg::PowerControl4::Address, REG_SET(Reg::PowerControl4, VDV, 0x15)); // VDV for VCOM amplitude
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write(Reg::PowerControl7::Address, REG_SET(Reg::PowerControl7, VCM, 0x27)); // VCM for VCOMH
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setFrameRate(FrameRate::fr128);
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HAL_Delay(50);
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//write(0x20, 0x0000); // GRAM horizontal Address
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//write(0x21, 0x0000); // GRAM Vertical Address
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//Set Gamma Curve
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GammaCurve curve = {
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0x0000,0x0707,0x0307,0x0200,0x0008,
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0x0004,0x0000,0x0707,0x0002,0x1D04
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};
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setGammaCurve(curve);
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//Set GRAM area
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write(Reg::HorizontalAddressStartPosition::Address, 0); // Horizontal GRAM Start Address
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write(Reg::HorizontalAddressEndPosition::Address, 239); // Horizontal GRAM End Address
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write(Reg::VerticalAddressStartPosition::Address, 0); // Vertical GRAM Start Address
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write(Reg::VerticalAddressEndPosition::Address, 319); // Vertical GRAM Start Address
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write(Reg::DriverOutputControl2::Address, REG_SET(Reg::DriverOutputControl2, NL, 0x27) | Reg::DriverOutputControl2::GS); // Gate Scan Line
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write(Reg::BaseImageDisplayControl::Address, Reg::BaseImageDisplayControl::REV);
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write(Reg::VerticalScrollControl::Address, 0); // set scrolling line
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//Partial Display Control
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write(Reg::PartialImage1DisplayPosition::Address, 0);
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write(Reg::PartialImage1StartLine::Address, 0);
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write(Reg::PartialImage1EndLine::Address, 0);
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write(Reg::PartialImage2DisplayPosition::Address, 0);
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write(Reg::PartialImage2StartLine::Address, 0);
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write(Reg::PartialImage2EndLine::Address, 0);
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//Panel Control
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write(Reg::PanelInterfaceControl1::Address, REG_SET(Reg::PanelInterfaceControl1, RTNI, 0x10));
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write(Reg::PanelInterfaceControl2::Address, REG_SET(Reg::PanelInterfaceControl2, NOWI, 0x06));
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write(Reg::DisplayControl1::Address,
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Reg::DisplayControl1::D0 | Reg::DisplayControl1::D1 |
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Reg::DisplayControl1::DTE | Reg::DisplayControl1::GON | Reg::DisplayControl1::BASEE); //display ON
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HAL_Delay(50);
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}
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static void setGammaCurve(GammaCurve curve){
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write(Reg::GammaControl1::Address, curve.v[0]);
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write(Reg::GammaControl2::Address, curve.v[1]);
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write(Reg::GammaControl3::Address, curve.v[2]);
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write(Reg::GammaControl4::Address, curve.v[3]);
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write(Reg::GammaControl5::Address, curve.v[4]);
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write(Reg::GammaControl6::Address, curve.v[5]);
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write(Reg::GammaControl7::Address, curve.v[6]);
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write(Reg::GammaControl8::Address, curve.v[7]);
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write(Reg::GammaControl9::Address, curve.v[8]);
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write(Reg::GammaControl10::Address, curve.v[9]);
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}
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static void setFrameRate(FrameRate frameRate){
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write(Reg::FrameRateAndColorControl::Address, REG_SET(Reg::FrameRateAndColorControl, FRS, (uint8_t)frameRate));
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}
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static bool setBackAndFrontPorch(uint8_t backPorch, uint8_t frontPorch){
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if((backPorch < 2) || (frontPorch < 2) || ((backPorch + frontPorch) > 16)){
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return false;
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}
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write(Reg::DisplayControl2::Address,
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REG_SET(Reg::DisplayControl2, BP, backPorch) |
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REG_SET(Reg::DisplayControl2, FP, frontPorch));
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return true;
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}
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static void setOrientation(uint8_t orientation){
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//TODO: remove BGR from here
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if (orientation == 0){
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write(Reg::EntryMode::Address, Reg::EntryMode::ID0 | Reg::EntryMode::ID1 | Reg::EntryMode::BGR);
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}else if (orientation == 90){
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write(Reg::EntryMode::Address, Reg::EntryMode::ID0 | Reg::EntryMode::AM | Reg::EntryMode::BGR);
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}else if (orientation == 180){
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write(Reg::EntryMode::Address, Reg::EntryMode::BGR);
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}else if (orientation == 270){
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write(Reg::EntryMode::Address, Reg::EntryMode::ID1 | Reg::EntryMode::BGR | Reg::EntryMode::AM);
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}
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}
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static void setCursor(uint16_t x, uint16_t y){
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write(Reg::HorizontalGRAMAddressSet::Address, x);
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write(Reg::VerticalGRAMAddressSet::Address, y);
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}
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static void beginWriteGram(){
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HW::setAddress(Reg::WriteDataToGRAM::Address);
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}
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static void write(uint16_t value){
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HW::write(value);
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}
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static void clear(uint16_t color){
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setCursor(0, 0);
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beginWriteGram();
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for(uint32_t index = 0; index < 320*240; index++ ){ //TODO: remove hardcode
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HW::write(color);
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}
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}
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};
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}
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#endif /* ILI9325_H_ */
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@@ -0,0 +1,412 @@
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/*
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* ili9325_registers.h
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*
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* Created on: 23 îêò. 2016 ã.
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* Author: l-pro
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*/
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#ifndef ILI9325_REGISTERS_H_
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#define ILI9325_REGISTERS_H_
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#include <cstdint>
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namespace Ili9325 { namespace Reg {
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/*template<uint16_t Address>
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struct Register {
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template<uint16_t BitOffset, uint16_t BitMask>
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struct BitSlice {
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};
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static constexpr uint16_t address;
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uint16_t value;
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constexpr Register():value(0){}
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constexpr Register(uint16_t val):value(val){}
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template<uint16_t BitOffset, uint16_t BitMask>
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uint16_t getBits() const noexcept {
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return (value >> BitOffset) & BitMask;
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}
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template<uint16_t BitOffset, uint16_t BitMask>
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void setBits(uint16_t val) const noexcept {
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return (value & ~(BitMask << BitOffset)) | ((val & BitMask) << BitOffset);
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}
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};*/
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#define COMBINE2(__a, __b) __a##__b
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#define COMBINE(__a, __b) COMBINE2(__a, __b)
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#define REG_SET(__register, __fieldName, __value)\
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(((__value) & __register::__fieldName##_bitmask) << (__register::__fieldName##_offset))
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/*struct DriverCodeRead_ : public Register<0x00> {
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typedef BitSlice<0, 0xffff> VAL;
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uint16_t getVAL() const { return getBits<0, 0xffff>(); }
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void setVAL(uint16_t val) const { setBits<0, 0xffff>(val); }
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};*/
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namespace DriverCodeRead {
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static constexpr uint16_t Address = 0x00;
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static constexpr uint16_t VAL_bitmask = 0xffff;
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static constexpr uint16_t VAL_offset = 0;
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}
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namespace DriverOutputControl {
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static constexpr uint16_t Address = 0x01;
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static constexpr uint16_t SS = 1 << 8; //Shift direction select
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static constexpr uint16_t SM = 1 << 10;
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}
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namespace LcdDrivingControl {
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static constexpr uint16_t Address = 0x02;
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static constexpr uint16_t EOR = 1 << 8; //EOR = 1 and B/C=1 to set the line inversion
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static constexpr uint16_t BC0 = 1 << 9; //0: Frame/Field inversion, 1: Line inversion
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}
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namespace EntryMode {
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static constexpr uint16_t Address = 0x03;
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//Control the GRAM update direction.
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//When AM = 0, the address is updated in horizontal writing direction.
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//When AM = 1, the address is updated in vertical writing direction.
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static constexpr uint16_t AM = 1 << 3;
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//Control the address counter (AC) to automatically increase or decrease
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//by 1 when update one pixel display data. Refer to the following figure for the details
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static constexpr uint16_t ID0 = 1 << 4;
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static constexpr uint16_t ID1 = 1 << 5;
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static constexpr uint16_t ORG = 1 << 7;
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static constexpr uint16_t HWM = 1 << 9;
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//RGB swap. 0 == RGB, 1 == BGR
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static constexpr uint16_t BGR = 1 << 12;
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static constexpr uint16_t DFM = 1 << 14;
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static constexpr uint16_t TRI = 1 << 15;
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}
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namespace ResizeControl {
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static constexpr uint16_t Address = 0x04;
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static constexpr uint16_t RSZ0 = 1 << 0;
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static constexpr uint16_t RSZ1 = 1 << 1;
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static constexpr uint16_t RCH0 = 1 << 4;
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static constexpr uint16_t RCH1 = 1 << 5;
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static constexpr uint16_t RCV0 = 1 << 8;
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static constexpr uint16_t RCV1 = 1 << 9;
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}
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namespace DisplayControl1 {
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static constexpr uint16_t Address = 0x07;
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//Enable internal display operations
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static constexpr uint16_t D0 = 1 << 0;
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//Turn on display
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static constexpr uint16_t D1 = 1 << 1;
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static constexpr uint16_t CL = 1 << 3;
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//DTE + GON => Set the output level of gate driver G1 ~ G320
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static constexpr uint16_t DTE = 1 << 4;
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static constexpr uint16_t GON = 1 << 5;
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//Base image display enable
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static constexpr uint16_t BASEE = 1 << 8;
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//Partial image 2 and Partial image 1 enable bits
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static constexpr uint16_t PTDE0 = 1 << 12;
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static constexpr uint16_t PTDE1 = 1 << 13;
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}
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namespace DisplayControl2 {
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static constexpr uint16_t Address = 0x08;
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//BP + FP <= 16 lines
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//Back porch (>= 2)
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static constexpr uint16_t BP_bitmask = 0xf;
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static constexpr uint16_t BP_offset = 0;
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//Front porch (>= 2)
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static constexpr uint16_t FP_bitmask = 0xf;
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static constexpr uint16_t FP_offset = 8;
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}
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namespace DisplayControl3 {
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static constexpr uint16_t Address = 0x09;
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static constexpr uint16_t ISC_bitmask = 0xf;
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static constexpr uint16_t ISC_offset = 0;
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static constexpr uint16_t PTG_bitmask = 0x3;
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static constexpr uint16_t PTG_offset = 4;
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static constexpr uint16_t PTS_bitmask = 0x7;
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static constexpr uint16_t PTS_offset = 8;
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}
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namespace DisplayControl4 {
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static constexpr uint16_t Address = 0x0A;
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static constexpr uint16_t FMI_bitmask = 0x7;
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static constexpr uint16_t FMI_offset = 0;
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static constexpr uint16_t FMARKOE = 1 << 3;
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}
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namespace RgbDisplayInterfaceControl1 {
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static constexpr uint16_t Address = 0x0C;
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//RGB Interface Mode 0 == 18 bit, 1 == 16 bit, 2 == 6 bit
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static constexpr uint16_t RIM_bitmask = 0x3;
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static constexpr uint16_t RIM_offset = 0;
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static constexpr uint16_t DM_bitmask = 0x3;
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static constexpr uint16_t DM_offset = 4;
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static constexpr uint16_t RM = 1 << 8;
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static constexpr uint16_t ENC_bitmask = 0x7;
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static constexpr uint16_t ENC_offset = 12;
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}
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namespace FrameMarkerPosition {
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static constexpr uint16_t Address = 0x0D;
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static constexpr uint16_t FMP_bitmask = 0x1ff;
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static constexpr uint16_t FMP_offset = 0;
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}
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namespace RgbDisplayInterfaceControl2 {
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static constexpr uint16_t Address = 0x0F;
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static constexpr uint16_t EPL0 = 1 << 0;
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static constexpr uint16_t DPL = 1 << 1;
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static constexpr uint16_t HSPL = 1 << 3;
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static constexpr uint16_t VSPL = 1 << 4;
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}
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namespace PowerControl1 {
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static constexpr uint16_t Address = 0x10;
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//Standby mode
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static constexpr uint16_t STB = 1 << 0;
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//Sleep mode (1 == sleep)
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static constexpr uint16_t SLP = 1 << 1;
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//Deep standby
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static constexpr uint16_t DSTB = 1 << 2;
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//Amplifier value
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static constexpr uint16_t AP_bitmask = 0x7;
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static constexpr uint16_t AP_offset = 4;
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//Power supply enable bit.
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static constexpr uint16_t APE = 1 << 7;
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static constexpr uint16_t BT_bitmask = 0x7;
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static constexpr uint16_t BT_offset = 8;
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//SAP=0, Source driver is disabled. SAP=1, Source driver is enabled.
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static constexpr uint16_t SAP = 1 << 12;
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}
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namespace PowerControl2 {
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static constexpr uint16_t Address = 0x11;
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//VCi ratio factor
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static constexpr uint16_t VC_bitmask = 0x7;
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static constexpr uint16_t VC_offset = 0;
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//Frequency of the step-up circuit 1
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static constexpr uint16_t DC0_bitmask = 0x7;
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static constexpr uint16_t DC0_offset = 4;
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//Frequency of the step-up circuit 2
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static constexpr uint16_t DC1_bitmask = 0x7;
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static constexpr uint16_t DC1_offset = 8;
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}
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namespace PowerControl3 {
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static constexpr uint16_t Address = 0x12;
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// amplifying rate
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static constexpr uint16_t VRH_bitmask = 0xf;
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static constexpr uint16_t VRH_offset = 0;
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//Control ON/OFF of circuit3 output
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static constexpr uint16_t PON = 1 << 4;
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//VCIRE=0 External reference voltage Vci (default) VCIRE = 1 Internal reference voltage 2.5V
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static constexpr uint16_t VCIRE = 1 << 7;
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}
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namespace PowerControl4 {
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static constexpr uint16_t Address = 0x13;
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static constexpr uint16_t VDV_bitmask = 0x1f;
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static constexpr uint16_t VDV_offset = 8;
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}
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namespace HorizontalGRAMAddressSet {
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static constexpr uint16_t Address = 0x20;
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static constexpr uint16_t AD_bitmask = 0xff;
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static constexpr uint16_t AD_offset = 0;
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}
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namespace VerticalGRAMAddressSet {
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static constexpr uint16_t Address = 0x21;
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static constexpr uint16_t AD_bitmask = 0x1ff;
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static constexpr uint16_t AD_offset = 0;
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}
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namespace WriteDataToGRAM {
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static constexpr uint16_t Address = 0x22;
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}
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namespace PowerControl7 {
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static constexpr uint16_t Address = 0x29;
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static constexpr uint16_t VCM_bitmask = 0x3f;
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static constexpr uint16_t VCM_offset = 0;
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}
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namespace FrameRateAndColorControl {
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static constexpr uint16_t Address = 0x2B;
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//0000 40
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//0001 43
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//0010 45
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//0011 48
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//0100 51
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//0101 55
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//0110 59
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//0111 64
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//1000 70
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//1001 77
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//1010 85
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//1011 96 (default)
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//1100 110
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//1101 128
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static constexpr uint16_t FRS_bitmask = 0xf;
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static constexpr uint16_t FRS_offset = 0;
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}
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||||
|
||||
namespace GammaControl1 {
|
||||
static constexpr uint16_t Address = 0x30;
|
||||
}
|
||||
namespace GammaControl2 {
|
||||
static constexpr uint16_t Address = 0x31;
|
||||
}
|
||||
namespace GammaControl3 {
|
||||
static constexpr uint16_t Address = 0x32;
|
||||
}
|
||||
namespace GammaControl4 {
|
||||
static constexpr uint16_t Address = 0x35;
|
||||
}
|
||||
namespace GammaControl5 {
|
||||
static constexpr uint16_t Address = 0x36;
|
||||
}
|
||||
namespace GammaControl6 {
|
||||
static constexpr uint16_t Address = 0x37;
|
||||
}
|
||||
namespace GammaControl7 {
|
||||
static constexpr uint16_t Address = 0x38;
|
||||
}
|
||||
namespace GammaControl8 {
|
||||
static constexpr uint16_t Address = 0x39;
|
||||
}
|
||||
namespace GammaControl9 {
|
||||
static constexpr uint16_t Address = 0x3C;
|
||||
}
|
||||
namespace GammaControl10 {
|
||||
static constexpr uint16_t Address = 0x3D;
|
||||
}
|
||||
|
||||
namespace HorizontalAddressStartPosition {
|
||||
static constexpr uint16_t Address = 0x50;
|
||||
}
|
||||
|
||||
namespace HorizontalAddressEndPosition {
|
||||
static constexpr uint16_t Address = 0x51;
|
||||
}
|
||||
|
||||
namespace VerticalAddressStartPosition {
|
||||
static constexpr uint16_t Address = 0x52;
|
||||
}
|
||||
|
||||
namespace VerticalAddressEndPosition {
|
||||
static constexpr uint16_t Address = 0x53;
|
||||
}
|
||||
|
||||
namespace DriverOutputControl2 {
|
||||
static constexpr uint16_t Address = 0x60;
|
||||
static constexpr uint16_t GS = 1 << 15;
|
||||
static constexpr uint16_t SCN_bitmask = 0x3f;
|
||||
static constexpr uint16_t SCN_offset = 0;
|
||||
static constexpr uint16_t NL_bitmask = 0x3f;
|
||||
static constexpr uint16_t NL_offset = 8;
|
||||
}
|
||||
|
||||
namespace BaseImageDisplayControl {
|
||||
static constexpr uint16_t Address = 0x61;
|
||||
static constexpr uint16_t REV = 1 << 0;
|
||||
static constexpr uint16_t VLE = 1 << 1;
|
||||
static constexpr uint16_t NDL = 1 << 2;
|
||||
}
|
||||
|
||||
namespace VerticalScrollControl {
|
||||
static constexpr uint16_t Address = 0x6A;
|
||||
static constexpr uint16_t VL_bitmask = 0x1ff;
|
||||
static constexpr uint16_t VL_offset = 0;
|
||||
}
|
||||
|
||||
namespace PartialImage1DisplayPosition {
|
||||
static constexpr uint16_t Address = 0x80;
|
||||
static constexpr uint16_t PTDP_bitmask = 0x1ff;
|
||||
static constexpr uint16_t PTDP_offset = 0;
|
||||
}
|
||||
|
||||
namespace PartialImage1StartLine {
|
||||
static constexpr uint16_t Address = 0x81;
|
||||
static constexpr uint16_t PTSA_bitmask = 0x1ff;
|
||||
static constexpr uint16_t PTSA_offset = 0;
|
||||
}
|
||||
|
||||
namespace PartialImage1EndLine {
|
||||
static constexpr uint16_t Address = 0x82;
|
||||
static constexpr uint16_t PTEA_bitmask = 0x1ff;
|
||||
static constexpr uint16_t PTEA_offset = 0;
|
||||
}
|
||||
|
||||
namespace PartialImage2DisplayPosition {
|
||||
static constexpr uint16_t Address = 0x83;
|
||||
static constexpr uint16_t PTDP_bitmask = 0x1ff;
|
||||
static constexpr uint16_t PTDP_offset = 0;
|
||||
}
|
||||
|
||||
namespace PartialImage2StartLine {
|
||||
static constexpr uint16_t Address = 0x84;
|
||||
static constexpr uint16_t PTSA_bitmask = 0x1ff;
|
||||
static constexpr uint16_t PTSA_offset = 0;
|
||||
}
|
||||
|
||||
namespace PartialImage2EndLine {
|
||||
static constexpr uint16_t Address = 0x85;
|
||||
static constexpr uint16_t PTEA_bitmask = 0x1ff;
|
||||
static constexpr uint16_t PTEA_offset = 0;
|
||||
}
|
||||
|
||||
namespace PanelInterfaceControl1 {
|
||||
static constexpr uint16_t Address = 0x90;
|
||||
static constexpr uint16_t RTNI_bitmask = 0x1f;
|
||||
static constexpr uint16_t RTNI_offset = 0;
|
||||
static constexpr uint16_t DIVI_bitmask = 0x3;
|
||||
static constexpr uint16_t DIVI_offset = 8;
|
||||
}
|
||||
|
||||
namespace PanelInterfaceControl2 {
|
||||
static constexpr uint16_t Address = 0x92;
|
||||
static constexpr uint16_t NOWI_bitmask = 0x7;
|
||||
static constexpr uint16_t NOWI_offset = 8;
|
||||
}
|
||||
|
||||
namespace PanelInterfaceControl4 {
|
||||
static constexpr uint16_t Address = 0x95;
|
||||
static constexpr uint16_t RTNE_bitmask = 0x3f;
|
||||
static constexpr uint16_t RTNE_offset = 0;
|
||||
static constexpr uint16_t DIVE_bitmask = 0x3;
|
||||
static constexpr uint16_t DIVE_offset = 8;
|
||||
}
|
||||
|
||||
namespace OTPVCMProgrammingControl {
|
||||
static constexpr uint16_t Address = 0xA1;
|
||||
static constexpr uint16_t VCM_OTP_bitmask = 0x3f;
|
||||
static constexpr uint16_t VCM_OTP_offset = 0;
|
||||
static constexpr uint16_t OTP_PGM_EN_bitmask = 0x1;
|
||||
static constexpr uint16_t OTP_PGM_EN_offset = 11;
|
||||
}
|
||||
|
||||
namespace OTPVCMStatusAndEnable {
|
||||
static constexpr uint16_t Address = 0xA2;
|
||||
static constexpr uint16_t VCM_EN = 1 << 0;
|
||||
static constexpr uint16_t VCM_D_bitmask = 0x3f;
|
||||
static constexpr uint16_t VCM_D_offset = 8;
|
||||
static constexpr uint16_t PGM_CNT_bitmask = 0x3;
|
||||
static constexpr uint16_t PGM_CNT_offset = 14;
|
||||
}
|
||||
|
||||
namespace OTPProgrammingIDKey {
|
||||
static constexpr uint16_t Address = 0xA5;
|
||||
static constexpr uint16_t KEY_bitmask = 0xffff;
|
||||
static constexpr uint16_t KEY_offset = 0;
|
||||
}
|
||||
|
||||
}}
|
||||
|
||||
|
||||
#endif /* ILI9325_REGISTERS_H_ */
|
||||
Reference in New Issue
Block a user