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2025-05-13 05:40:22 +03:00
parent ceb6d0ccec
commit bc5fe2e797
110 changed files with 106075 additions and 0 deletions
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+# This is an mozg_f7_v1 board with a single STM32F746VGTx chip.
+# Generated by System Workbench for STM32
+
+source [find interface/stlink-v2.cfg]
+
+set WORKAREASIZE 0x50000
+transport select "hla_swd"
+
+
+source [find target/stm32f7x.cfg]
+
+# use hardware reset, connect under reset
+reset_config srst_only srst_nogate