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evk407i/doc/EVK407I-Demo/USB FS Examples/Libraries/CMSIS/Documentation/CMSIS-SVD_Schema_1_0.xsd
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<?xml version="1.0" encoding="UTF-8"?>
<!--
@date: 29.07.2011
@note Copyright (C) 2011 ARM Limited. All rights reserved.
@par
ARM Limited (ARM) is supplying this software for use with Cortex-M
processor based microcontroller, but can be equally used for other
suitable processor architectures. This file can be freely distributed.
Modifications to this file shall be clearly marked.
@par
THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
-->
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<html>
<head>
<title>CMSIS Debug Support</title>
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<body>
<h1>CMSIS Debug Support</h1>
<p align="center">This file describes the CMSIS Debug support available with CMSIS (starting V1.30).</p>
<p align="center">Version: 1.02 - 25. July 2011</p>
<p class="TinyT">Information in this file, the accompany manuals, and software is<br>
Copyright © ARM Ltd.<br>All rights reserved.
</p>
<hr>
<p><span style="FONT-WEIGHT: bold">Revision History</span></p>
<ul>
<li>Version 1.00: Initial Release. </li>
<li>Version 1.01: Internal Review. </li>
<li>Version 1.02: Removed product specific information. </li>
</ul>
<hr>
<h2>Contents</h2>
<ol>
<li class="LI2"><a href="#About">About</a></li>
<li class="LI2"><a href="#ITM_DbgAcc">Cortex-M3 / Cortex-M4 ITM Debug Access</a></li>
<li class="LI2"><a href="#DbgIn_DbgOut">Debug IN / OUT functions</a></li>
<li class="LI2"><a href="#ITM_DbgSup">ITM Debug Support in Debugger</a></li>
</ol>
<p>&nbsp;</p>
<h2><a name="About"></a>About</h2>
<p>
CMSIS provides for Cortex-M3 / Cortex-M4 processor based microcontrollers debug support via the Instrumented Trace Macrocell (ITM).
This document describes the available CMSIS Debug functions and the used methods.
</p>
<p>&nbsp;</p>
<h2><a name="ITM_DbgAcc"></a>Cortex-M3 / Cortex-M4 ITM Debug Access</h2>
<p>
The Cortex-M3 incorporates the Instrumented Trace Macrocell (ITM) that provides together with
the Serial Viewer Output trace capabilities for the microcontroller system. The ITM has
32 communication channels which are able to transmit 32 / 16 / 8 bit values; two ITM
communication channels are used by CMSIS to output the following information:
</p>
<ul>
<li>ITM Channel 0: used for printf-style output via the debug interface.</li>
<li>ITM Channel 31: is reserved for RTOS kernel awareness debugging.</li>
</ul>
<p>&nbsp;</p>
<h2><a name="DbgIn_DbgOut"></a>Debug IN / OUT functions</h2>
<p>CMSIS provides following debug functions:</p>
<ul>
<li>ITM_SendChar (uses ITM channel 0)</li>
<li>ITM_ReceiveChar (uses global variable)</li>
<li>ITM_CheckChar (uses global variable)</li>
</ul>
<h3>ITM_SendChar</h3>
<p>
<strong>ITM_SendChar</strong> is used to transmit a character over ITM channel 0 from
the microcontroller system to the debug system. <br>
Only a 8 bit value is transmitted.
</p>
<pre>
static __INLINE uint32_t ITM_SendChar (uint32_t ch)
{
/* check if debugger connected and ITM channel enabled for tracing */
if ((CoreDebug->DEMCR & CoreDebug_DEMCR_TRCENA) &amp;&amp;
(ITM-&gt;TCR & ITM_TCR_ITMENA) &amp;&amp;
(ITM-&gt;TER & (1UL &lt;&lt; 0)) )
{
while (ITM-&gt;PORT[0].u32 == 0);
ITM-&gt;PORT[0].u8 = (uint8_t)ch;
}
return (ch);
}</pre>
<h3>ITM_ReceiveChar</h3>
<p>
ITM communication channel is only capable for OUT direction. For IN direction
a global variable is used. A simple mechanism detects if a character is received.
The project to test need to be build with debug information.
</p>
<p>
The global variable <strong>ITM_RxBuffer</strong> is used to transmit a 8 bit value from debug system
to microcontroller system. <strong>ITM_RxBuffer</strong> is 32 bit wide to
ensure a proper handshake.
</p>
<pre>
extern volatile int32_t ITM_RxBuffer; /* variable to receive characters */
</pre>
<p>
A dedicated bit pattern is used to determine if <strong>ITM_RxBuffer</strong> is empty
or contains a valid value.
</p>
<pre>
#define ITM_RXBUFFER_EMPTY 0x5AA55AA5 /* value identifying ITM_RxBuffer is ready for next character */
</pre>
<p>
<strong>ITM_ReceiveChar</strong> is used to receive a 8 bit value from the debug system. The function is nonblocking.
It returns the received character or '-1' if no character was available.
</p>
<pre>
static __INLINE int32_t ITM_ReceiveChar (void) {
int32_t ch = -1; /* no character available */
if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) {
ch = ITM_RxBuffer;
ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* ready for next character */
}
return (ch);
}
</pre>
<h3>ITM_CheckChar</h3>
<p>
<strong>ITM_CheckChar</strong> is used to check if a character is received.
</p>
<pre>
static __INLINE int32_t ITM_CheckChar (void) {
if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) {
return (0); /* no character available */
} else {
return (1); /* character available */
}
}</pre>
<p>&nbsp;</p>
<h2><a name="ITM_DbgSup"></a>ITM Debug Support in a Debugger</h2>
<p>
The Debugger shall offer a dedicated console window for printf style debug input and output using the CMSIS defined ITM methods described above.
</p>
<p>Direction: Microcontroller -&gt; Debugger:</p>
<ul>
<li>
at the beginning of a debug session the debugger shall enable ITM trace on channel 0 and continuously snoop for channel 0 data on the ITM trace
stream it receives from the Microcontroller's CoreSight ITM unit
</li>
<li>
data received via the ITM communication channel 0 is interpreted as charater and gets redirected into the dedicated <strong>Console Window</strong>
</li>
</ul>
<p>Direction: Debugger -&gt; Microcontroller:</p>
<ul>
<li>
at the beginning of a debug session the debugger shall seek for the presence of the global variable named <strong>ITM_RxBuffer</strong> in the debug
information of the application being loaded
</li>
<li>
strings entered into the <strong>Console Window</strong> are written by the debugger as a stream of char values via the variable <strong>ITM_RxBuffer</strong>.
</li>
<li>
the debugger writes the next character into the <strong>ITM_RxBuffer</strong> only once the value has been read and the <strong>ITM_RXBUFFER_EMPTY</strong> value being set.
(refer to: ITM_ReceiveChar()).
</ul>
</body>
</html>
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<head>
<title>CMSIS Version History</title>
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<body>
<h1>CMSIS Version History</h1>
<p align="center">This document describes the changes between the different CMSIS versions.</p>
<p align="center">Version: 2.10 - July 2011</p>
<p class="TinyT">Information in this file, the accompany manuals, and software is<br>
Copyright © ARM Ltd.<br>All rights reserved.
</p>
<hr>
<h2>Contents</h2>
<ol>
<li class="LI2"><a href="#Toolchain">Used Toolchains</a></li>
<li class="LI2"><a href="#6">Changes to version V2.00</a></li>
<li class="LI2"><a href="#5">Changes to version V1.30</a></li>
<li class="LI2"><a href="#4">Changes to version V1.20</a></li>
<li class="LI2"><a href="#2">Open Points</a></li>
<li class="LI2"><a href="#1">Limitations</a></li>
</ol>
<h2><a name="Toolchain"></a>Used Toolchains</h2>
<p>
Following toolchains have been used for test / verification:</i>.
</p>
<ul>
<li>ARM: MDK-ARM Version 4.21</li>
<li>GNU: Sourcery G++ Lite Edition for ARM 2010.09-51</li>
<li>IAR: IAR Embedded Workbench Kickstart Edition V6.10</li>
</ul>
<h2><a name="6"></a>Changes to version V2.00</h2>
<h3>Added CMSIS DSP Software Library support for Cortex-M0 based MCUs</h3>
<p>
The <strong>CMSIS DSP Software Library</strong> provides now also libraries and examples for Cortex-M0.
</p>
<p>
For more information refer to <i>CMSIS DSP Library documentation</i>.
</p>
<h3>Added big endian support for DSP library</h3>
<p>
The <strong>CMSIS DSP Software Library</strong> provides now also pre-build libraries
and projects for big endian devices.
</p>
<p>
For more information refer to <i>CMSIS DSP Library documentation</i>.
</p>
<h3>Simplified folder structure for CMSIS include files</h3>
<p>
All CMSIS core include files as well as the DSP-Library header files are located in
a single folder <strong>./CMSIS/Include</strong>.
</p>
<h3>Changed folder structure for Device Support packages</h3>
<p>
Device Support packages are expected to be in folder <strong>./Device</strong> located at the
same level as <strong>./CMSIS</strong>.
</p>
<p>The new Device folder contains the following subfolders:</p>
<ul>
<li><b>Device</b></li>
<ul>
<li>&lt;<b>Vendor</b>&gt;
<ul>
<li>&lt;<b>Device</b>&gt; | &lt;<b>Device Series</b>&gt;
<ul>
<li><b>Include</b><br>
&lt;device&gt;.h<br>
system_&lt;device&gt;.h<br>
</li>
<li><b>Source</b>
<ul>
<li><b>Templates</b><br>
system_&lt;device&gt;.c<br>
<ul>
<li>&lt;<b>Toolchain</b>&gt;<br>
startup_&lt;device&gt;.s<br>
</li>
<li>&lt;<b>Toolchain</b>&gt;</li>
<li>...</li>
</ul>
</li>
</ul>
</li>
</ul>
<li>&lt;<b>Device</b>&gt; | &lt;<b>Device Series</b>&gt;</li>
<li>...</li>
</ul>
</li>
<li>&lt;<b>Vendor</b>&gt;</li>
<li>...</li>
</ul>
</li>
</ul>
<p>Template files are application specific files and are required to be copied to the project prior to use!</p>
<h3>Removed CMSIS core source files</h3>
<p>
The CMSIS core source files <strong>core_cm0.c, core_cm3.c, core_cm4.c</strong>
containing helper functions for older ARM compiler versions got removed.
</p>
<p>
For the <b>ARM Compiler Toolchain </b>version <b>V4.0.677</b> or later is
required!</p>
<h2><a name="5"></a>Changes to version V1.30</h2>
<h3>Added CMSIS DSP Software Library</h3>
<p>
The <strong>CMSIS DSP Software Library</strong> is a suite of common signal processing functions targeted
to Cortex-M processor based microcontrollers. Even though the code has been specifically
optimized towards using the extended DSP instruction set of the Cortex-M4 processor,
the library can be compiled for any Cortex-M processor.
</p>
<p>
For more information see <i>CMSIS DSP Library documentation</i>.
</p>
<h3>Added CMSIS System View Description</h3>
<p>
The <strong>CMSIS System View Description</strong> answers the challenges of accurate, detailed and
timely device aware peripheral debugging support for Cortex Microcontroller based
devices by the software development tools vendor community.
</p>
<p>
Silicon vendors shall create and maintain a formalized description of the debug view
for all the peripherals contained in their Cortex Microcontroller based devices.
Tool vendors use such descriptions to establish device specific debug support in
their debugging tools.
</p>
<p>
A standardized System View Description shall provide a common approach to
capturing peripheral debug related information in a machine readable files.
</p>
<p>
For more information see <i>CMSIS System View Description</i>.
</p>
<h3>Added Cortex-M4 Core Support</h3>
<p>
Additional folder <strong>CM4</strong>, containing the Cortex-M4 core support files, has been added.
</p>
<ul>
<li>CM0</li>
<li>CM3</li>
<li>CM4
<ul>
<li>CoreSupport</li>
<li>DeviceSupport</li>
</ul>
</li>
</ul>
<h3>New naming for Core Support Files</h3>
<p>
The new Core Support Files are:
</p>
<ul>
<li>core_cm#.h (# = 0, 3, 4)</li>
<li>core_cmFunc.h (Cortex-M Core Register access functions)</li>
<li>core_cmInstr.h (Cortex-M Core instructions)</li>
<li>core_cm4_simd.h (Cortex-M4 SIMD instructions)</li>
</ul>
<h2><a name="4"></a>Changes to version V1.20</h2>
<h3>Removed CMSIS Middelware packages</h3>
<p>
CMSIS Middleware is removed and no longer focus of CMSIS.
</p>
<h3>SystemFrequency renamed to SystemCoreClock</h3>
<p>
The variable name <strong>SystemCoreClock</strong> is more precise than <strong>SystemFrequency</strong>
because the variable holds the clock value at which the core is running.
</p>
<h3>Changed startup concept</h3>
<p>
The old startup concept (calling SystemInit_ExtMemCtl from startup file and calling SystemInit
from main) has the weakness that it does not work for controllers which need a already
configuerd clock system to configure the external memory controller.
</p>
<h5>Changed startup concept</h5>
<ul>
<li>
SystemInit() is called from startup file before <strong>premain</strong>.
</li>
<li>
<strong>SystemInit()</strong> configures the clock system and also configures
an existing external memory controller.
</li>
<li>
<strong>SystemInit()</strong> must not use global variables.
</li>
<li>
<strong>SystemCoreClock</strong> is initialized with a correct predefined value.
</li>
<li>
Additional function <strong>void SystemCoreClockUpdate (void)</strong> is provided.<br>
<strong>SystemCoreClockUpdate()</strong> updates the variable <strong>SystemCoreClock</strong>
and must be called whenever the core clock is changed.<br>
<strong>SystemCoreClockUpdate()</strong> evaluates the clock register settings and calculates
the current core clock.
</li>
</ul>
<h3>Advanced Debug Functions</h3>
<p>
ITM communication channel is only capable for OUT direction. To allow also communication for
IN direction a simple concept is provided.
</p>
<ul>
<li>
Global variable <strong>volatile int ITM_RxBuffer</strong> used for IN data.
</li>
<li>
Function <strong>int ITM_CheckChar (void)</strong> checks if a new character is available.
</li>
<li>
Function <strong>int ITM_ReceiveChar (void)</strong> retrieves the new character.
</li>
</ul>
<p>
For detailed explanation see file <strong>CMSIS debug support.htm</strong>.
</p>
<h3>Core Register Bit Definitions</h3>
<p>
Files core_cm3.h and core_cm0.h contain now bit definitions for Core Registers. The name for the
defines correspond with the Cortex-M Technical Reference Manual.
</p>
<p>
e.g. SysTick structure with bit definitions
</p>
<pre>
/** \brief Structure type to access the System Timer (SysTick).
*/
typedef struct
{
__IO uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */
__IO uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */
__IO uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */
__I uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */
} SysTick_Type;
/* SysTick Control / Status Register Definitions */
#define SysTick_CTRL_COUNTFLAG_Pos 16 /*!< SysTick CTRL: COUNTFLAG Position */
#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */
#define SysTick_CTRL_CLKSOURCE_Pos 2 /*!< SysTick CTRL: CLKSOURCE Position */
#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */
#define SysTick_CTRL_TICKINT_Pos 1 /*!< SysTick CTRL: TICKINT Position */
#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */
#define SysTick_CTRL_ENABLE_Pos 0 /*!< SysTick CTRL: ENABLE Position */
#define SysTick_CTRL_ENABLE_Msk (1UL << SysTick_CTRL_ENABLE_Pos) /*!< SysTick CTRL: ENABLE Mask */
/* SysTick Reload Register Definitions */
#define SysTick_LOAD_RELOAD_Pos 0 /*!< SysTick LOAD: RELOAD Position */
#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL << SysTick_LOAD_RELOAD_Pos) /*!< SysTick LOAD: RELOAD Mask */
/* SysTick Current Register Definitions */
#define SysTick_VAL_CURRENT_Pos 0 /*!< SysTick VAL: CURRENT Position */
#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL << SysTick_VAL_CURRENT_Pos) /*!< SysTick VAL: CURRENT Mask */
/* SysTick Calibration Register Definitions */
#define SysTick_CALIB_NOREF_Pos 31 /*!< SysTick CALIB: NOREF Position */
#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */
#define SysTick_CALIB_SKEW_Pos 30 /*!< SysTick CALIB: SKEW Position */
#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */
#define SysTick_CALIB_TENMS_Pos 0 /*!< SysTick CALIB: TENMS Position */
#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL << SysTick_VAL_CURRENT_Pos) /*!< SysTick CALIB: TENMS Mask */
/*@} end of group CMSIS_SysTick */</pre>
<h3>DoxyGen Tags</h3>
<p>
DoxyGen tags in files core_cm3.[c,h] and core_cm0.[c,h] are reworked to create proper documentation
using DoxyGen.
</p>
<h3>Folder Structure</h3>
<p>
The folder structure is changed to differentiate the single support packages.
</p>
<ul>
<li>CM0</li>
<li>CM3
<ul>
<li>CoreSupport</li>
<li>DeviceSupport</li>
<ul>
<li>Vendor
<ul>
<li>Device
<ul>
<li>Startup
<ul>
<li>Toolchain</li>
<li>Toolchain</li>
<li>...</li>
</ul>
</li>
</ul>
</li>
<li>Device</li>
<li>...</li>
</ul>
</li>
<li>Vendor</li>
<li>...</li>
</ul>
</li>
<li>Example <i>(optional)</i>
<ul>
<li>Toolchain
<ul>
<li>Device</li>
<li>Device</li>
<li>...</li>
</ul>
</li>
<li>Toolchain</li>
<li>...</li>
</ul>
</li>
</ul>
</li>
<li>Documentation</li>
</ul>
<h2><a name="2"></a>Open Points</h2>
<p>
Following points need to be clarified and solved:
</p>
<ul>
<li>
<p>
Equivalent C and Assembler startup files.
</p>
<p>
Is there a need for having C startup files although assembler startup files are
very efficient and do not need to be changed?
<p/>
</li>
<li>
<p>
Placing of HEAP in external RAM.
</p>
<p>
It must be possible to place HEAP in external RAM if the device supports an
external memory controller.
</p>
</li>
<li>
<p>
Placing of STACK /HEAP.
</p>
<p>
STACK should always be placed at the end of internal RAM.
</p>
<p>
If HEAP is placed in internal RAM than it should be placed after RW ZI section.
</p>
</li>
</ul>
<h2><a name="1"></a>Limitations</h2>
<p>
The following limitations are not covered with the current CMSIS version:
</p>
<ul>
<li>
No <strong>C startup files</strong> are available.
</li>
</ul>
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