This commit is contained in:
2025-05-13 04:55:13 +03:00
parent 3f693566bd
commit ceb6d0ccec
4364 changed files with 2897163 additions and 0 deletions
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@@ -0,0 +1,388 @@
ARM Macro Assembler Page 1
1 00000000 ;*******************************************************
*************************************************
2 00000000 ; uC/CPU
3 00000000 ; CPU CONFIGURATION &
PORT LAYER
4 00000000 ;
5 00000000 ; (c) Copyright 2004-2008; Micr
ium, Inc.; Weston, FL
6 00000000 ;
7 00000000 ; All rights reserved. Protected by inter
national copyright laws.
8 00000000 ;
9 00000000 ; uC/CPU is provided in source form for FR
EE evaluation, for educational
10 00000000 ; use or peaceful research. If you plan o
n using uC/CPU in a commercial
11 00000000 ; product you need to contact Micrium to p
roperly license its use in your
12 00000000 ; product. We provide ALL the source code
for your convenience and to
13 00000000 ; help you experience uC/CPU. The fact th
at the source code is provided
14 00000000 ; does NOT mean that you can use it withou
t paying a licensing fee.
15 00000000 ;
16 00000000 ; Knowledge of the source code may NOT be
used to develop a similar product.
17 00000000 ;
18 00000000 ; Please help us continue to provide the E
mbedded community with the finest
19 00000000 ; software available. Your honesty is gre
atly appreciated.
20 00000000 ;*******************************************************
*************************************************
21 00000000
22 00000000
23 00000000 ;*******************************************************
*************************************************
24 00000000 ;
25 00000000 ; CPU PORT FI
LE
26 00000000 ;
27 00000000 ; ARM-Cortex-
M3
28 00000000 ; RealView Developm
ent Suite
29 00000000 ; RealView Microcontroller De
velopment Kit (MDK)
30 00000000 ; ARM Developer Su
ite (ADS)
31 00000000 ; Keil uVisio
n
32 00000000 ;
33 00000000 ; Filename : cpu_a.asm
34 00000000 ; Version : V1.19
35 00000000 ; Programmer(s) : BAN
36 00000000 ;*******************************************************
*************************************************
37 00000000
ARM Macro Assembler Page 2
38 00000000
39 00000000 ;*******************************************************
*************************************************
40 00000000 ; PUBLIC FUNCT
IONS
41 00000000 ;*******************************************************
*************************************************
42 00000000
43 00000000 EXPORT CPU_IntDis
44 00000000 EXPORT CPU_IntEn
45 00000000
46 00000000 EXPORT CPU_SR_Save
47 00000000 EXPORT CPU_SR_Restore
48 00000000
49 00000000 EXPORT CPU_CntLeadZeros
50 00000000 EXPORT CPU_RevBits
51 00000000
52 00000000 EXPORT CPU_WaitForInt
53 00000000 EXPORT CPU_WaitForExcept
54 00000000
55 00000000
56 00000000 ;*******************************************************
*************************************************
57 00000000 ; CODE GENERATION D
IRECTIVES
58 00000000 ;*******************************************************
*************************************************
59 00000000
60 00000000 AREA |.text|, CODE, READONLY, ALIGN=
2
61 00000000 THUMB
62 00000000 REQUIRE8
63 00000000 PRESERVE8
64 00000000
65 00000000
66 00000000 ;$PAGE
67 00000000 ;*******************************************************
**************************************************
68 00000000 ; DISABLE and ENABLE
INTERRUPTS
69 00000000 ;
70 00000000 ; Description : Disable/Enable interrupts.
71 00000000 ;
72 00000000 ; Prototypes : void CPU_IntDis(void);
73 00000000 ; void CPU_IntEn (void);
74 00000000 ;*******************************************************
**************************************************
75 00000000
76 00000000 CPU_IntDis
77 00000000 B672 CPSID I
78 00000002 4770 BX LR
79 00000004
80 00000004
81 00000004 CPU_IntEn
82 00000004 B662 CPSIE I
83 00000006 4770 BX LR
84 00000008
85 00000008
86 00000008 ;*******************************************************
ARM Macro Assembler Page 3
**************************************************
87 00000008 ; CRITICAL SECTION
FUNCTIONS
88 00000008 ;
89 00000008 ; Description : Disable/Enable interrupts by preserving
the state of interrupts. Generally speaking, the
90 00000008 ; state of the interrupt disable flag is s
tored in the local variable 'cpu_sr' & interrupts
91 00000008 ; are then disabled ('cpu_sr' is allocated
in all functions that need to disable interrupts).
92 00000008 ; The previous interrupt state is restored
by copying 'cpu_sr' into the CPU's status register.
93 00000008 ;
94 00000008 ; Prototypes : CPU_SR CPU_SR_Save (void);
95 00000008 ; void CPU_SR_Restore(CPU_SR cpu_sr);
96 00000008 ;
97 00000008 ;
98 00000008 ; Note(s) : (1) These functions are used in general
like this:
99 00000008 ;
100 00000008 ; void Task (void *p_arg)
101 00000008 ; {
102 00000008 ;
/* Allocate storage for CPU status register */
103 00000008 ; #if (CPU_CFG_CRITICAL_METHOD == CPU_
CRITICAL_METHOD_STATUS_LOCAL)
104 00000008 ; CPU_SR cpu_sr;
105 00000008 ; #endif
106 00000008 ;
107 00000008 ; :
108 00000008 ; :
109 00000008 ; CPU_CRITICAL_ENTER();
/* cpu_sr = CPU_SR_Save(); */
110 00000008 ; :
111 00000008 ; :
112 00000008 ; CPU_CRITICAL_EXIT();
/* CPU_SR_Restore(cpu_sr); */
113 00000008 ; :
114 00000008 ; :
115 00000008 ; }
116 00000008 ;*******************************************************
**************************************************
117 00000008
118 00000008 CPU_SR_Save
119 00000008 F3EF 8010 MRS R0, PRIMASK ; Set prio int mask
to mask all (excep
t faults)
120 0000000C B672 CPSID I
121 0000000E 4770 BX LR
122 00000010
123 00000010
124 00000010 CPU_SR_Restore ; See Note #2.
125 00000010 F380 8810 MSR PRIMASK, R0
126 00000014 4770 BX LR
127 00000016
128 00000016
129 00000016 ;$PAGE
130 00000016 ;*******************************************************
*************************************************
ARM Macro Assembler Page 4
131 00000016 ; COUNT LEADING
ZEROS
132 00000016 ;
133 00000016 ; Description : Counts the number of binary zero bits be
fore the first binary one bit in the argument.
134 00000016 ; If the argument is zero, the value 32 is
returned.
135 00000016 ;
136 00000016 ; Prototypes : CPU_INT32U CPU_CntLeadZeros (CPU_INT32U
val)
137 00000016 ;
138 00000016 ; Argument(s) : val variable to count leading zeros
139 00000016 ;*******************************************************
*************************************************
140 00000016
141 00000016 CPU_CntLeadZeros
142 00000016 FAB0 F080 CLZ R0, R0 ; Count leading zer
os
143 0000001A 4770 BX LR
144 0000001C
145 0000001C
146 0000001C ;*******************************************************
*************************************************
147 0000001C ; REVERSE BI
TS
148 0000001C ;
149 0000001C ; Description : Reverses the bits in the argument.
150 0000001C ;
151 0000001C ; Prototypes : CPU_INT32U CPU_RevBits (CPU_INT32U val)
152 0000001C ;
153 0000001C ; Argument(s) : val variable to reverse
154 0000001C ;*******************************************************
*************************************************
155 0000001C
156 0000001C CPU_RevBits
157 0000001C FA90 F0A0 RBIT R0, R0 ; Reverse bits
158 00000020 4770 BX LR
159 00000022
160 00000022
161 00000022 ;$PAGE
162 00000022 ;*******************************************************
*************************************************
163 00000022 ; WAIT FOR INTER
RUPT
164 00000022 ;
165 00000022 ; Description : Enters sleep state, which will be exited
when an interrupt is received.
166 00000022 ;
167 00000022 ; Prototypes : void CPU_WaitForInt (void)
168 00000022 ;
169 00000022 ; Argument(s) : none.
170 00000022 ;*******************************************************
*************************************************
171 00000022
172 00000022 CPU_WaitForInt
173 00000022 BF30 WFI ; Wait for interrup
t
174 00000024 4770 BX LR
ARM Macro Assembler Page 5
175 00000026
176 00000026
177 00000026 ;*******************************************************
*************************************************
178 00000026 ; WAIT FOR EXCEP
TION
179 00000026 ;
180 00000026 ; Description : Enters sleep state, which will be exited
when an exception is received.
181 00000026 ;
182 00000026 ; Prototypes : void CPU_WaitForExcept (void)
183 00000026 ;
184 00000026 ; Argument(s) : none.
185 00000026 ;*******************************************************
*************************************************
186 00000026
187 00000026 CPU_WaitForExcept
188 00000026 BF20 WFE ; Wait for exceptio
n
189 00000028 4770 BX LR
190 0000002A
191 0000002A
192 0000002A ;$PAGE
193 0000002A ;*******************************************************
*************************************************
194 0000002A ; CPU ASSEMBLY PORT
FILE END
195 0000002A ;*******************************************************
*************************************************
196 0000002A
197 0000002A END
Command Line: --debug --xref --diag_suppress=9931 --cpu=Cortex-M4 --apcs=interw
ork --depend=.\out\cpu_a.d -o.\out\cpu_a.o -ID:\Keil_v515\ARM\RV31\INC -ID:\Kei
l_v515\ARM\CMSIS\Include -ID:\Keil_v515\ARM\Inc\ST\STM32F4xx --predefine="__UVI
SION_VERSION SETA 515" --list=.\list\cpu_a.lst ..\User\uC-CPU\ARM-Cortex-M3\Rea
lView\cpu_a.asm
ARM Macro Assembler Page 1 Alphabetic symbol ordering
Relocatable symbols
.text 00000000
Symbol: .text
Definitions
At line 60 in file ..\User\uC-CPU\ARM-Cortex-M3\RealView\cpu_a.asm
Uses
None
Comment: .text unused
CPU_CntLeadZeros 00000016
Symbol: CPU_CntLeadZeros
Definitions
At line 141 in file ..\User\uC-CPU\ARM-Cortex-M3\RealView\cpu_a.asm
Uses
At line 49 in file ..\User\uC-CPU\ARM-Cortex-M3\RealView\cpu_a.asm
Comment: CPU_CntLeadZeros used once
CPU_IntDis 00000000
Symbol: CPU_IntDis
Definitions
At line 76 in file ..\User\uC-CPU\ARM-Cortex-M3\RealView\cpu_a.asm
Uses
At line 43 in file ..\User\uC-CPU\ARM-Cortex-M3\RealView\cpu_a.asm
Comment: CPU_IntDis used once
CPU_IntEn 00000004
Symbol: CPU_IntEn
Definitions
At line 81 in file ..\User\uC-CPU\ARM-Cortex-M3\RealView\cpu_a.asm
Uses
At line 44 in file ..\User\uC-CPU\ARM-Cortex-M3\RealView\cpu_a.asm
Comment: CPU_IntEn used once
CPU_RevBits 0000001C
Symbol: CPU_RevBits
Definitions
At line 156 in file ..\User\uC-CPU\ARM-Cortex-M3\RealView\cpu_a.asm
Uses
At line 50 in file ..\User\uC-CPU\ARM-Cortex-M3\RealView\cpu_a.asm
Comment: CPU_RevBits used once
CPU_SR_Restore 00000010
Symbol: CPU_SR_Restore
Definitions
At line 124 in file ..\User\uC-CPU\ARM-Cortex-M3\RealView\cpu_a.asm
Uses
At line 47 in file ..\User\uC-CPU\ARM-Cortex-M3\RealView\cpu_a.asm
Comment: CPU_SR_Restore used once
CPU_SR_Save 00000008
Symbol: CPU_SR_Save
Definitions
At line 118 in file ..\User\uC-CPU\ARM-Cortex-M3\RealView\cpu_a.asm
Uses
At line 46 in file ..\User\uC-CPU\ARM-Cortex-M3\RealView\cpu_a.asm
Comment: CPU_SR_Save used once
CPU_WaitForExcept 00000026
Symbol: CPU_WaitForExcept
ARM Macro Assembler Page 2 Alphabetic symbol ordering
Relocatable symbols
Definitions
At line 187 in file ..\User\uC-CPU\ARM-Cortex-M3\RealView\cpu_a.asm
Uses
At line 53 in file ..\User\uC-CPU\ARM-Cortex-M3\RealView\cpu_a.asm
Comment: CPU_WaitForExcept used once
CPU_WaitForInt 00000022
Symbol: CPU_WaitForInt
Definitions
At line 172 in file ..\User\uC-CPU\ARM-Cortex-M3\RealView\cpu_a.asm
Uses
At line 52 in file ..\User\uC-CPU\ARM-Cortex-M3\RealView\cpu_a.asm
Comment: CPU_WaitForInt used once
9 symbols
340 symbols in table
@@ -0,0 +1,630 @@
ARM Macro Assembler Page 1
1 00000000 ;*******************************************************
*************************************************
2 00000000 ; uC/LIB
3 00000000 ; CUSTOM LIBRARY M
ODULES
4 00000000 ;
5 00000000 ; (c) Copyright 2004-2008; Micr
ium, Inc.; Weston, FL
6 00000000 ;
7 00000000 ; All rights reserved. Protected by inter
national copyright laws.
8 00000000 ;
9 00000000 ; uC/LIB is provided in source form for FR
EE evaluation, for educational
10 00000000 ; use or peaceful research. If you plan o
n using uC/LIB in a commercial
11 00000000 ; product you need to contact Micrium to p
roperly license its use in your
12 00000000 ; product. We provide ALL the source code
for your convenience and to
13 00000000 ; help you experience uC/LIB. The fact th
at the source code is provided
14 00000000 ; does NOT mean that you can use it withou
t paying a licensing fee.
15 00000000 ;
16 00000000 ; Knowledge of the source code may NOT be
used to develop a similar product.
17 00000000 ;
18 00000000 ; Please help us continue to provide the E
mbedded community with the finest
19 00000000 ; software available. Your honesty is gre
atly appreciated.
20 00000000 ;*******************************************************
*************************************************
21 00000000
22 00000000
23 00000000 ;*******************************************************
*************************************************
24 00000000 ;
25 00000000 ; STANDARD MEMORY OP
ERATIONS
26 00000000 ;
27 00000000 ; ARM-Cortex-M
3
28 00000000 ; RealView Developme
nt Suite
29 00000000 ; RealView Microcontroller De
velopment Kit (MDK)
30 00000000 ; ARM Developer Sui
te (ADS)
31 00000000 ; Keil uVision
32 00000000 ;
33 00000000 ; Filename : lib_mem_a.asm
34 00000000 ; Version : V1.25
35 00000000 ; Programmer(s) : JDH
36 00000000 ; BAN
37 00000000 ;*******************************************************
*************************************************
ARM Macro Assembler Page 2
38 00000000 ; Note(s) : (1) NO compiler-supplied standard libr
ary functions are used in library or product software.
39 00000000 ;
40 00000000 ; (a) ALL standard library functions
are implemented in the custom library modules :
41 00000000 ;
42 00000000 ; (1) \<Custom Library Directory
>\lib*.*
43 00000000 ;
44 00000000 ; (2) \<Custom Library Directory
>\Ports\<cpu>\<compiler>\lib*_a.*
45 00000000 ;
46 00000000 ; where
47 00000000 ; <Custom Library
Directory> directory path for custom library softwa
re
48 00000000 ; <cpu>
directory name for specific processor (C
PU)
49 00000000 ; <compiler>
directory name for specific compiler
50 00000000 ;
51 00000000 ; (b) Product-specific library funct
ions are implemented in individual products.
52 00000000 ;
53 00000000 ; (2) Assumes ARM CPU mode configured fo
r Little Endian.
54 00000000 ;*******************************************************
*************************************************
55 00000000
56 00000000
57 00000000 ;*******************************************************
*************************************************
58 00000000 ; PUBLIC FUNCT
IONS
59 00000000 ;*******************************************************
*************************************************
60 00000000
61 00000000 EXPORT Mem_Copy
62 00000000
63 00000000
64 00000000 ;*******************************************************
*************************************************
65 00000000 ; CODE GENERATION D
IRECTIVES
66 00000000 ;*******************************************************
*************************************************
67 00000000
68 00000000 AREA |.text|, CODE, READONLY, ALIGN=
2
69 00000000 THUMB
70 00000000 REQUIRE8
71 00000000 PRESERVE8
72 00000000
73 00000000
74 00000000 ;$PAGE
75 00000000 ;*******************************************************
*************************************************
76 00000000 ; Mem_Copy()
ARM Macro Assembler Page 3
77 00000000 ;
78 00000000 ; Description : Copy data octets from one buffer to anot
her buffer.
79 00000000 ;
80 00000000 ; Argument(s) : pdest Pointer to destination memor
y buffer.
81 00000000 ;
82 00000000 ; psrc Pointer to source memor
y buffer.
83 00000000 ;
84 00000000 ; size Number of data buffer octets
to copy.
85 00000000 ;
86 00000000 ; Return(s) : none.
87 00000000 ;
88 00000000 ; Caller(s) : Application.
89 00000000 ;
90 00000000 ; Note(s) : (1) Null copies allowed (i.e. 0-octet si
ze).
91 00000000 ;
92 00000000 ; (2) Memory buffers NOT checked for overl
apping.
93 00000000 ;
94 00000000 ; (3) Modulo arithmetic is used to determi
ne whether a memory buffer starts on a 'CPU_ALIGN'
95 00000000 ; address boundary.
96 00000000 ;
97 00000000 ; (4) ARM Cortex-M3 processors use a subse
t of the ARM Thumb-2 instruction set which does
98 00000000 ; NOT support 16-bit conditional branc
h instructions but ONLY supports 8-bit conditional
99 00000000 ; branch instructions.
100 00000000 ;
101 00000000 ; Therefore, branches exceeding 8-bit,
signed, relative offsets :
102 00000000 ;
103 00000000 ; (a) CANNOT be implemented with c
onditional branches; but ...
104 00000000 ; (b) MUST be implemented with non-c
onditional branches.
105 00000000 ;*******************************************************
*************************************************
106 00000000
107 00000000 ; void Mem_Copy (void *pdest, ; ==> R0
108 00000000 ; void *psrc, ; ==> R1
109 00000000 ; CPU_SIZE_T size) ; ==> R2
110 00000000
111 00000000 Mem_Copy
112 00000000 2800 CMP R0, #0
113 00000002 D100 BNE Mem_Copy_1
114 00000004 4770 BX LR ; return if pdest =
= NULL
115 00000006
116 00000006 Mem_Copy_1
117 00000006 2900 CMP R1, #0
118 00000008 D100 BNE Mem_Copy_2
119 0000000A 4770 BX LR ; return if psrc =
= NULL
ARM Macro Assembler Page 4
120 0000000C
121 0000000C Mem_Copy_2
122 0000000C 2A00 CMP R2, #0
123 0000000E D100 BNE Mem_Copy_3
124 00000010 4770 BX LR ; return if size =
= 0
125 00000012
126 00000012 Mem_Copy_3
127 00000012 E92D 1FF8 STMFD SP!, {R3-R12} ; save registers
on stack
128 00000016
129 00000016
130 00000016 ;$PAGE
131 00000016 Chk_Align_32 ; check if both des
t & src 32-bit alig
ned
132 00000016 F000 0303 AND R3, R0, #0x03
133 0000001A F001 0403 AND R4, R1, #0x03
134 0000001E 42A3 CMP R3, R4
135 00000020 D111 BNE Chk_Align_16 ; not 32-bit align
ed, check for 16-bi
t alignment
136 00000022
137 00000022 F1C3 0304 RSB R3, R3, #0x04 ; compute 1-2-3 p
re-copy bytes (to a
lign to the next 32
-bit boundary)
138 00000026 F003 0303 AND R3, R3, #0x03
139 0000002A
140 0000002A Pre_Copy_1
141 0000002A 2B01 CMP R3, #1 ; copy 1-2-3 bytes
(to align to the ne
xt 32-bit boundary)
142 0000002C D31D BCC Copy_32_1 ; start real 32-bit
copy
143 0000002E 2A01 CMP R2, #1 ; check if any more
data to copy
144 00000030 D200 BCS Pre_Copy_1_Cont
145 00000032 E0F2 B Mem_Copy_END ; no mor
e data to copy (see
Note #4b)
146 00000034
147 00000034 Pre_Copy_1_Cont
148 00000034 F811 4B01 LDRB R4, [R1], #1
149 00000038 F800 4B01 STRB R4, [R0], #1
150 0000003C F1A3 0301 SUB R3, R3, #1
151 00000040 F1A2 0201 SUB R2, R2, #1
152 00000044 E7F1 B Pre_Copy_1
153 00000046
154 00000046
155 00000046 Chk_Align_16 ; check if both des
t & src 16-bit alig
ned
156 00000046 F000 0301 AND R3, R0, #0x01
157 0000004A F001 0401 AND R4, R1, #0x01
158 0000004E 42A3 CMP R3, R4
159 00000050 D000 BEQ Pre_Copy_2
160 00000052 E094 B Copy_08_1 ; not 16-bit aligne
ARM Macro Assembler Page 5
d, start 8-bit copy
(see Note #4b)
161 00000054
162 00000054 Pre_Copy_2
163 00000054 2B01 CMP R3, #1 ; copy 1 byte (to a
lign to the next 16
-bit boundary)
164 00000056 D344 BCC Copy_16_1 ; start real 16-bit
copy
165 00000058
166 00000058 F811 4B01 LDRB R4, [R1], #1
167 0000005C F800 4B01 STRB R4, [R0], #1
168 00000060 F1A3 0301 SUB R3, R3, #1
169 00000064 F1A2 0201 SUB R2, R2, #1
170 00000068 E7F4 B Pre_Copy_2
171 0000006A
172 0000006A
173 0000006A Copy_32_1
174 0000006A F5B2 7FB4 CMP R2, #(04*10*09) ; Copy 9 chunks
of 10 32-bit words
(360 octets per lo
op)
175 0000006E D326 BCC Copy_32_2
176 00000070 E8B1 1FF8 LDMIA R1!, {R3-R12}
177 00000074 E8A0 1FF8 STMIA R0!, {R3-R12}
178 00000078 E8B1 1FF8 LDMIA R1!, {R3-R12}
179 0000007C E8A0 1FF8 STMIA R0!, {R3-R12}
180 00000080 E8B1 1FF8 LDMIA R1!, {R3-R12}
181 00000084 E8A0 1FF8 STMIA R0!, {R3-R12}
182 00000088 E8B1 1FF8 LDMIA R1!, {R3-R12}
183 0000008C E8A0 1FF8 STMIA R0!, {R3-R12}
184 00000090 E8B1 1FF8 LDMIA R1!, {R3-R12}
185 00000094 E8A0 1FF8 STMIA R0!, {R3-R12}
186 00000098 E8B1 1FF8 LDMIA R1!, {R3-R12}
187 0000009C E8A0 1FF8 STMIA R0!, {R3-R12}
188 000000A0 E8B1 1FF8 LDMIA R1!, {R3-R12}
189 000000A4 E8A0 1FF8 STMIA R0!, {R3-R12}
190 000000A8 E8B1 1FF8 LDMIA R1!, {R3-R12}
191 000000AC E8A0 1FF8 STMIA R0!, {R3-R12}
192 000000B0 E8B1 1FF8 LDMIA R1!, {R3-R12}
193 000000B4 E8A0 1FF8 STMIA R0!, {R3-R12}
194 000000B8 F5A2 72B4 SUB R2, R2, #(04*10*09)
195 000000BC E7D5 B Copy_32_1
196 000000BE
197 000000BE Copy_32_2
198 000000BE 2A28 CMP R2, #(04*10*01) ; Copy chunks o
f 10 32-bit words (
40 octets per loop)
199 000000C0 D306 BCC Copy_32_3
200 000000C2 E8B1 1FF8 LDMIA R1!, {R3-R12}
201 000000C6 E8A0 1FF8 STMIA R0!, {R3-R12}
202 000000CA F1A2 0228 SUB R2, R2, #(04*10*01)
203 000000CE E7F6 B Copy_32_2
204 000000D0
205 000000D0 Copy_32_3
206 000000D0 2A04 CMP R2, #(04*01*01) ; Copy remainin
g 32-bit words
207 000000D2 D306 BCC Copy_16_1
ARM Macro Assembler Page 6
208 000000D4 F851 3B04 LDR R3, [R1], #4
209 000000D8 F840 3B04 STR R3, [R0], #4
210 000000DC F1A2 0204 SUB R2, R2, #(04*01*01)
211 000000E0 E7F6 B Copy_32_3
212 000000E2
213 000000E2 ;$PAGE
214 000000E2 Copy_16_1
215 000000E2 2A20 CMP R2, #(02*01*16) ; Copy chunks o
f 16 16-bit words (
32 bytes per loop)
216 000000E4 D342 BCC Copy_16_2
217 000000E6 F831 3B02 LDRH R3, [R1], #2
218 000000EA F820 3B02 STRH R3, [R0], #2
219 000000EE F831 3B02 LDRH R3, [R1], #2
220 000000F2 F820 3B02 STRH R3, [R0], #2
221 000000F6 F831 3B02 LDRH R3, [R1], #2
222 000000FA F820 3B02 STRH R3, [R0], #2
223 000000FE F831 3B02 LDRH R3, [R1], #2
224 00000102 F820 3B02 STRH R3, [R0], #2
225 00000106 F831 3B02 LDRH R3, [R1], #2
226 0000010A F820 3B02 STRH R3, [R0], #2
227 0000010E F831 3B02 LDRH R3, [R1], #2
228 00000112 F820 3B02 STRH R3, [R0], #2
229 00000116 F831 3B02 LDRH R3, [R1], #2
230 0000011A F820 3B02 STRH R3, [R0], #2
231 0000011E F831 3B02 LDRH R3, [R1], #2
232 00000122 F820 3B02 STRH R3, [R0], #2
233 00000126 F831 3B02 LDRH R3, [R1], #2
234 0000012A F820 3B02 STRH R3, [R0], #2
235 0000012E F831 3B02 LDRH R3, [R1], #2
236 00000132 F820 3B02 STRH R3, [R0], #2
237 00000136 F831 3B02 LDRH R3, [R1], #2
238 0000013A F820 3B02 STRH R3, [R0], #2
239 0000013E F831 3B02 LDRH R3, [R1], #2
240 00000142 F820 3B02 STRH R3, [R0], #2
241 00000146 F831 3B02 LDRH R3, [R1], #2
242 0000014A F820 3B02 STRH R3, [R0], #2
243 0000014E F831 3B02 LDRH R3, [R1], #2
244 00000152 F820 3B02 STRH R3, [R0], #2
245 00000156 F831 3B02 LDRH R3, [R1], #2
246 0000015A F820 3B02 STRH R3, [R0], #2
247 0000015E F831 3B02 LDRH R3, [R1], #2
248 00000162 F820 3B02 STRH R3, [R0], #2
249 00000166 F1A2 0220 SUB R2, R2, #(02*01*16)
250 0000016A E7BA B Copy_16_1
251 0000016C
252 0000016C Copy_16_2
253 0000016C 2A02 CMP R2, #(02*01*01) ; Copy remainin
g 16-bit words
254 0000016E D306 BCC Copy_08_1
255 00000170 F831 3B02 LDRH R3, [R1], #2
256 00000174 F820 3B02 STRH R3, [R0], #2
257 00000178 F1A2 0202 SUB R2, R2, #(02*01*01)
258 0000017C E7F6 B Copy_16_2
259 0000017E
260 0000017E ;$PAGE
261 0000017E Copy_08_1
262 0000017E 2A10 CMP R2, #(01*01*16) ; Copy chunks o
f 16 8-bit words (1
ARM Macro Assembler Page 7
6 bytes per loop)
263 00000180 D342 BCC Copy_08_2
264 00000182 F811 3B01 LDRB R3, [R1], #1
265 00000186 F800 3B01 STRB R3, [R0], #1
266 0000018A F811 3B01 LDRB R3, [R1], #1
267 0000018E F800 3B01 STRB R3, [R0], #1
268 00000192 F811 3B01 LDRB R3, [R1], #1
269 00000196 F800 3B01 STRB R3, [R0], #1
270 0000019A F811 3B01 LDRB R3, [R1], #1
271 0000019E F800 3B01 STRB R3, [R0], #1
272 000001A2 F811 3B01 LDRB R3, [R1], #1
273 000001A6 F800 3B01 STRB R3, [R0], #1
274 000001AA F811 3B01 LDRB R3, [R1], #1
275 000001AE F800 3B01 STRB R3, [R0], #1
276 000001B2 F811 3B01 LDRB R3, [R1], #1
277 000001B6 F800 3B01 STRB R3, [R0], #1
278 000001BA F811 3B01 LDRB R3, [R1], #1
279 000001BE F800 3B01 STRB R3, [R0], #1
280 000001C2 F811 3B01 LDRB R3, [R1], #1
281 000001C6 F800 3B01 STRB R3, [R0], #1
282 000001CA F811 3B01 LDRB R3, [R1], #1
283 000001CE F800 3B01 STRB R3, [R0], #1
284 000001D2 F811 3B01 LDRB R3, [R1], #1
285 000001D6 F800 3B01 STRB R3, [R0], #1
286 000001DA F811 3B01 LDRB R3, [R1], #1
287 000001DE F800 3B01 STRB R3, [R0], #1
288 000001E2 F811 3B01 LDRB R3, [R1], #1
289 000001E6 F800 3B01 STRB R3, [R0], #1
290 000001EA F811 3B01 LDRB R3, [R1], #1
291 000001EE F800 3B01 STRB R3, [R0], #1
292 000001F2 F811 3B01 LDRB R3, [R1], #1
293 000001F6 F800 3B01 STRB R3, [R0], #1
294 000001FA F811 3B01 LDRB R3, [R1], #1
295 000001FE F800 3B01 STRB R3, [R0], #1
296 00000202 F1A2 0210 SUB R2, R2, #(01*01*16)
297 00000206 E7BA B Copy_08_1
298 00000208
299 00000208 Copy_08_2
300 00000208 2A01 CMP R2, #(01*01*01) ; Copy remainin
g 8-bit words
301 0000020A D306 BCC Mem_Copy_END
302 0000020C F811 3B01 LDRB R3, [R1], #1
303 00000210 F800 3B01 STRB R3, [R0], #1
304 00000214 F1A2 0201 SUB R2, R2, #(01*01*01)
305 00000218 E7F6 B Copy_08_2
306 0000021A
307 0000021A
308 0000021A Mem_Copy_END
309 0000021A E8BD 1FF8 LDMFD SP!, {R3-R12} ; restore registe
rs from stack
310 0000021E 4770 BX LR ; return
311 00000220
312 00000220
313 00000220 END
Command Line: --debug --xref --diag_suppress=9931 --cpu=Cortex-M4 --apcs=interw
ork --depend=.\out\lib_mem_a.d -o.\out\lib_mem_a.o -ID:\Keil_v515\ARM\RV31\INC
-ID:\Keil_v515\ARM\CMSIS\Include -ID:\Keil_v515\ARM\Inc\ST\STM32F4xx --predefin
e="__UVISION_VERSION SETA 515" --list=.\list\lib_mem_a.lst ..\User\uC-LIB\Ports
\RealView\lib_mem_a.asm
ARM Macro Assembler Page 1 Alphabetic symbol ordering
Relocatable symbols
.text 00000000
Symbol: .text
Definitions
At line 68 in file ..\User\uC-LIB\Ports\RealView\lib_mem_a.asm
Uses
None
Comment: .text unused
Chk_Align_16 00000046
Symbol: Chk_Align_16
Definitions
At line 155 in file ..\User\uC-LIB\Ports\RealView\lib_mem_a.asm
Uses
At line 135 in file ..\User\uC-LIB\Ports\RealView\lib_mem_a.asm
Comment: Chk_Align_16 used once
Chk_Align_32 00000016
Symbol: Chk_Align_32
Definitions
At line 131 in file ..\User\uC-LIB\Ports\RealView\lib_mem_a.asm
Uses
None
Comment: Chk_Align_32 unused
Copy_08_1 0000017E
Symbol: Copy_08_1
Definitions
At line 261 in file ..\User\uC-LIB\Ports\RealView\lib_mem_a.asm
Uses
At line 160 in file ..\User\uC-LIB\Ports\RealView\lib_mem_a.asm
At line 254 in file ..\User\uC-LIB\Ports\RealView\lib_mem_a.asm
At line 297 in file ..\User\uC-LIB\Ports\RealView\lib_mem_a.asm
Copy_08_2 00000208
Symbol: Copy_08_2
Definitions
At line 299 in file ..\User\uC-LIB\Ports\RealView\lib_mem_a.asm
Uses
At line 263 in file ..\User\uC-LIB\Ports\RealView\lib_mem_a.asm
At line 305 in file ..\User\uC-LIB\Ports\RealView\lib_mem_a.asm
Copy_16_1 000000E2
Symbol: Copy_16_1
Definitions
At line 214 in file ..\User\uC-LIB\Ports\RealView\lib_mem_a.asm
Uses
At line 164 in file ..\User\uC-LIB\Ports\RealView\lib_mem_a.asm
At line 207 in file ..\User\uC-LIB\Ports\RealView\lib_mem_a.asm
At line 250 in file ..\User\uC-LIB\Ports\RealView\lib_mem_a.asm
Copy_16_2 0000016C
Symbol: Copy_16_2
Definitions
At line 252 in file ..\User\uC-LIB\Ports\RealView\lib_mem_a.asm
Uses
ARM Macro Assembler Page 2 Alphabetic symbol ordering
Relocatable symbols
At line 216 in file ..\User\uC-LIB\Ports\RealView\lib_mem_a.asm
At line 258 in file ..\User\uC-LIB\Ports\RealView\lib_mem_a.asm
Copy_32_1 0000006A
Symbol: Copy_32_1
Definitions
At line 173 in file ..\User\uC-LIB\Ports\RealView\lib_mem_a.asm
Uses
At line 142 in file ..\User\uC-LIB\Ports\RealView\lib_mem_a.asm
At line 195 in file ..\User\uC-LIB\Ports\RealView\lib_mem_a.asm
Copy_32_2 000000BE
Symbol: Copy_32_2
Definitions
At line 197 in file ..\User\uC-LIB\Ports\RealView\lib_mem_a.asm
Uses
At line 175 in file ..\User\uC-LIB\Ports\RealView\lib_mem_a.asm
At line 203 in file ..\User\uC-LIB\Ports\RealView\lib_mem_a.asm
Copy_32_3 000000D0
Symbol: Copy_32_3
Definitions
At line 205 in file ..\User\uC-LIB\Ports\RealView\lib_mem_a.asm
Uses
At line 199 in file ..\User\uC-LIB\Ports\RealView\lib_mem_a.asm
At line 211 in file ..\User\uC-LIB\Ports\RealView\lib_mem_a.asm
Mem_Copy 00000000
Symbol: Mem_Copy
Definitions
At line 111 in file ..\User\uC-LIB\Ports\RealView\lib_mem_a.asm
Uses
At line 61 in file ..\User\uC-LIB\Ports\RealView\lib_mem_a.asm
Comment: Mem_Copy used once
Mem_Copy_1 00000006
Symbol: Mem_Copy_1
Definitions
At line 116 in file ..\User\uC-LIB\Ports\RealView\lib_mem_a.asm
Uses
At line 113 in file ..\User\uC-LIB\Ports\RealView\lib_mem_a.asm
Comment: Mem_Copy_1 used once
Mem_Copy_2 0000000C
Symbol: Mem_Copy_2
Definitions
At line 121 in file ..\User\uC-LIB\Ports\RealView\lib_mem_a.asm
Uses
At line 118 in file ..\User\uC-LIB\Ports\RealView\lib_mem_a.asm
Comment: Mem_Copy_2 used once
Mem_Copy_3 00000012
Symbol: Mem_Copy_3
Definitions
At line 126 in file ..\User\uC-LIB\Ports\RealView\lib_mem_a.asm
ARM Macro Assembler Page 3 Alphabetic symbol ordering
Relocatable symbols
Uses
At line 123 in file ..\User\uC-LIB\Ports\RealView\lib_mem_a.asm
Comment: Mem_Copy_3 used once
Mem_Copy_END 0000021A
Symbol: Mem_Copy_END
Definitions
At line 308 in file ..\User\uC-LIB\Ports\RealView\lib_mem_a.asm
Uses
At line 145 in file ..\User\uC-LIB\Ports\RealView\lib_mem_a.asm
At line 301 in file ..\User\uC-LIB\Ports\RealView\lib_mem_a.asm
Pre_Copy_1 0000002A
Symbol: Pre_Copy_1
Definitions
At line 140 in file ..\User\uC-LIB\Ports\RealView\lib_mem_a.asm
Uses
At line 152 in file ..\User\uC-LIB\Ports\RealView\lib_mem_a.asm
Comment: Pre_Copy_1 used once
Pre_Copy_1_Cont 00000034
Symbol: Pre_Copy_1_Cont
Definitions
At line 147 in file ..\User\uC-LIB\Ports\RealView\lib_mem_a.asm
Uses
At line 144 in file ..\User\uC-LIB\Ports\RealView\lib_mem_a.asm
Comment: Pre_Copy_1_Cont used once
Pre_Copy_2 00000054
Symbol: Pre_Copy_2
Definitions
At line 162 in file ..\User\uC-LIB\Ports\RealView\lib_mem_a.asm
Uses
At line 159 in file ..\User\uC-LIB\Ports\RealView\lib_mem_a.asm
At line 170 in file ..\User\uC-LIB\Ports\RealView\lib_mem_a.asm
18 symbols
349 symbols in table
@@ -0,0 +1,699 @@
ARM Macro Assembler Page 1
1 00000000 ;*******************************************************
*************************************************
2 00000000 ; uC/OS-II
3 00000000 ; The Real-Time
Kernel
4 00000000 ;
5 00000000 ; (c) Copyright 1992-2006,
Micrium, Weston, FL
6 00000000 ; All Rights Re
served
7 00000000 ;
8 00000000 ; Generic ARM
Port
9 00000000 ;
10 00000000 ; File : OS_CPU_A.ASM
11 00000000 ; Version : V2.86
12 00000000 ; By : Jean J. Labrosse
13 00000000 ;
14 00000000 ; For : ARMv7M Cortex-M3
15 00000000 ; Mode : Thumb2
16 00000000 ; Toolchain : RealView Development Suite
17 00000000 ; RealView Microcontroller Development Kit (
MDK)
18 00000000 ; ARM Developer Suite (ADS)
19 00000000 ; Keil uVision
20 00000000 ;*******************************************************
*************************************************
21 00000000
22 00000000 ;*******************************************************
*************************************************
23 00000000 ; PUBLIC FUNCT
IONS
24 00000000 ;*******************************************************
*************************************************
25 00000000
26 00000000 EXTERN OSRunning ; External referenc
es
27 00000000 EXTERN OSPrioCur
28 00000000 EXTERN OSPrioHighRdy
29 00000000 EXTERN OSTCBCur
30 00000000 EXTERN OSTCBHighRdy
31 00000000 EXTERN OSIntNesting
32 00000000 EXTERN OSIntExit
33 00000000 EXTERN OSTaskSwHook
34 00000000
35 00000000
36 00000000 EXPORT OS_CPU_SR_Save ; Functions decl
ared in this file
37 00000000 EXPORT OS_CPU_SR_Restore
38 00000000 EXPORT OSStartHighRdy
39 00000000 EXPORT OSCtxSw
40 00000000 EXPORT OSIntCtxSw
41 00000000 EXPORT PendSV_Handler
42 00000000
43 00000000 ;*******************************************************
*************************************************
44 00000000 ; EQUATES
ARM Macro Assembler Page 2
45 00000000 ;*******************************************************
*************************************************
46 00000000
47 00000000 E000ED04
NVIC_INT_CTRL
EQU 0xE000ED04 ; Interrupt control
state register.
48 00000000 E000ED22
NVIC_SYSPRI14
EQU 0xE000ED22 ; System priority r
egister (priority 1
4).
49 00000000 000000FF
NVIC_PENDSV_PRI
EQU 0xFF ; PendSV priority v
alue (lowest).
50 00000000 10000000
NVIC_PENDSVSET
EQU 0x10000000 ; Value to trigger
PendSV exception.
51 00000000
52 00000000 ;*******************************************************
*************************************************
53 00000000 ; CODE GENERATION D
IRECTIVES
54 00000000 ;*******************************************************
*************************************************
55 00000000
56 00000000 AREA |.text|, CODE, READONLY, ALIGN=
2
57 00000000 THUMB
58 00000000 REQUIRE8
59 00000000 PRESERVE8
60 00000000
61 00000000 ;*******************************************************
*************************************************
62 00000000 ; CRITICAL SECTION MET
HOD 3 FUNCTIONS
63 00000000 ;保存中断允许寄存器~PRIMASK 这个是只有一位的寄存器,参考M
3权威指南
64 00000000 ; Description: Disable/Enable interrupts by preserving t
he state of interrupts. Generally speaking you
65 00000000 ; would store the state of the interrupt di
sable flag in the local variable 'cpu_sr' and then
66 00000000 ; disable interrupts. 'cpu_sr' is allocate
d in all of uC/OS-II's functions that need to
67 00000000 ; disable interrupts. You would restore th
e interrupt disable state by copying back 'cpu_sr'
68 00000000 ; into the CPU's status register.
69 00000000 ;
70 00000000 ; Prototypes : OS_CPU_SR OS_CPU_SR_Save(void);
71 00000000 ; void OS_CPU_SR_Restore(OS_CPU_S
R cpu_sr);
72 00000000 ;
73 00000000 ;
74 00000000 ; Note(s) : 1) These functions are used in general li
ke this:
75 00000000 ;
76 00000000 ; void Task (void *p_arg)
ARM Macro Assembler Page 3
77 00000000 ; {
78 00000000 ; #if OS_CRITICAL_METHOD == 3 /
* Allocate storage for CPU status register */
79 00000000 ; OS_CPU_SR cpu_sr;
80 00000000 ; #endif
81 00000000 ;
82 00000000 ; :
83 00000000 ; :
84 00000000 ; OS_ENTER_CRITICAL(); /
* cpu_sr = OS_CPU_SaveSR(); */
85 00000000 ; :
86 00000000 ; :
87 00000000 ; OS_EXIT_CRITICAL(); /
* OS_CPU_RestoreSR(cpu_sr); */
88 00000000 ; :
89 00000000 ; :
90 00000000 ; }
91 00000000 ;*******************************************************
*************************************************
92 00000000 ;函数返回值存储在R0中
93 00000000
94 00000000 OS_CPU_SR_Save
95 00000000 F3EF 8010 MRS R0, PRIMASK ;保存全局中断标志
; Set prio int mask
to mask all (excep
t faults)
96 00000004 B672 CPSID I ;关中断
97 00000006 4770 BX LR
98 00000008
99 00000008 ;通过R0传递参数
100 00000008
101 00000008 OS_CPU_SR_Restore
102 00000008 F380 8810 MSR PRIMASK, R0 ;恢复全局中断标志
103 0000000C 4770 BX LR
104 0000000E
105 0000000E ;*******************************************************
*************************************************
106 0000000E ; START MULTITA
SKING
107 0000000E ; void OSStartHigh
Rdy(void)
108 0000000E ;
109 0000000E ; Note(s) : 1) This function triggers a PendSV exception
(essentially, causes a context switch) to cause
110 0000000E ; the first task to start.
111 0000000E ;
112 0000000E ; 2) OSStartHighRdy() MUST:
113 0000000E ; a) Setup PendSV exception priority to low
est;
114 0000000E ; b) Set initial PSP to 0, to tell context
switcher this is first run;
115 0000000E ; c) Set OSRunning to TRUE;
116 0000000E ; d) Trigger PendSV exception;
117 0000000E ; e) Enable interrupts (tasks will run with
interrupts enabled).
118 0000000E ;*******************************************************
*************************************************
119 0000000E
120 0000000E OSStartHighRdy
ARM Macro Assembler Page 4
121 0000000E 481D LDR R0, =NVIC_SYSPRI14 ; Set the Pe
ndSV exception prio
rity
122 00000010 F04F 01FF LDR R1, =NVIC_PENDSV_PRI
123 00000014 7001 STRB R1, [R0]
124 00000016
125 00000016 2000 MOVS R0, #0 ; Set the PSP to 0
for initial context
switch call
126 00000018 F380 8809 MSR PSP, R0
127 0000001C
128 0000001C 481A LDR R0, =OSRunning
; OSRunning = TRUE
129 0000001E 2101 MOVS R1, #1
130 00000020 7001 STRB R1, [R0]
131 00000022
132 00000022 481A LDR R0, =NVIC_INT_CTRL ; Trigger th
e PendSV exception
(causes context swi
tch)
133 00000024 F04F 5180 LDR R1, =NVIC_PENDSVSET
134 00000028 6001 STR R1, [R0]
135 0000002A
136 0000002A B662 CPSIE I ; Enable interrupts
at processor level
137 0000002C
138 0000002C OSStartHang
139 0000002C E7FE B OSStartHang ; Should never get
here
140 0000002E
141 0000002E
142 0000002E ;*******************************************************
*************************************************
143 0000002E ; PERFORM A CONTEXT SWITCH
(From task level)
144 0000002E ; void OSCtxSw
(void)
145 0000002E ;
146 0000002E ; Note(s) : 1) OSCtxSw() is called when OS wants to perf
orm a task context switch. This function
147 0000002E ; triggers the PendSV exception which is wh
ere the real work is done.
148 0000002E ;*******************************************************
*************************************************
149 0000002E
150 0000002E OSCtxSw
151 0000002E 4817 LDR R0, =NVIC_INT_CTRL ; Trigger th
e PendSV exception
(causes context swi
tch)
152 00000030 F04F 5180 LDR R1, =NVIC_PENDSVSET
153 00000034 6001 STR R1, [R0]
154 00000036 4770 BX LR
155 00000038
156 00000038 ;*******************************************************
*************************************************
157 00000038 ; PERFORM A CONTEXT SWITCH (
From interrupt level)
ARM Macro Assembler Page 5
158 00000038 ; void OSIntCtxS
w(void)
159 00000038 ;
160 00000038 ; Notes: 1) OSIntCtxSw() is called by OSIntExit() whe
n it determines a context switch is needed as
161 00000038 ; the result of an interrupt. This functio
n simply triggers a PendSV exception which will
162 00000038 ; be handled when there are no more interru
pts active and interrupts are enabled.
163 00000038 ;*******************************************************
*************************************************
164 00000038
165 00000038 OSIntCtxSw
166 00000038 4814 LDR R0, =NVIC_INT_CTRL ; Trigger th
e PendSV exception
(causes context swi
tch)
167 0000003A F04F 5180 LDR R1, =NVIC_PENDSVSET
168 0000003E 6001 STR R1, [R0]
169 00000040 4770 BX LR
170 00000042
171 00000042 ;*******************************************************
*************************************************
172 00000042 ; HANDLE PendSV
EXCEPTION
173 00000042 ; void OS_CPU_PendSV
Handler(void)
174 00000042 ;PENDSV中断,M3的所谓可悬挂请求中断,类似于当年ARM7的软中�
习蓗主要由上面的OSCtxSw,OSIntCtxSw触发,也就是
175 00000042 ; 可人为触发的中断.名字必须符合库函数里面PENDSV的声明�
��
176 00000042 ; 关于PENDSV中断的用处,参照CM3权威指南~PENDSV是专为OS�
��隼吹囊桓鲋卸�(可悬挂)
177 00000042 ; Note(s) : 1) PendSV is used to cause a context switch.
This is a recommended method for performing
178 00000042 ; context switches with Cortex-M3. This is
because the Cortex-M3 auto-saves half of the
179 00000042 ; processor context on any exception, and r
estores same on return from exception. So only
180 00000042 ; saving of R4-R11 is required and fixing u
p the stack pointers. Using the PendSV exception
181 00000042 ; this way means that context saving and re
storing is identical whether it is initiated from
182 00000042 ; a thread or occurs due to an interrupt or
exception.
183 00000042 ;
184 00000042 ; 2) Pseudo-code is:
185 00000042 ; a) Get the process SP, if 0 then skip (go
to d) the saving part (first context switch);
186 00000042 ; b) Save remaining regs r4-r11 on process
stack;
187 00000042 ; c) Save the process SP in its TCB, OSTCBC
ur->OSTCBStkPtr = SP;
188 00000042 ; d) Call OSTaskSwHook();
189 00000042 ; e) Get current high priority, OSPrioCur =
OSPrioHighRdy;
190 00000042 ; f) Get current ready thread TCB, OSTCBCur
= OSTCBHighRdy;
191 00000042 ; g) Get new process SP from TCB, SP = OSTC
ARM Macro Assembler Page 6
BHighRdy->OSTCBStkPtr;
192 00000042 ; h) Restore R4-R11 from new process stack;
193 00000042 ; i) Perform exception return which will re
store remaining context.
194 00000042 ;
195 00000042 ; 3) On entry into PendSV handler:
196 00000042 ; a) The following have been saved on the p
rocess stack (by processor):
197 00000042 ; xPSR, PC, LR, R12, R0-R3
198 00000042 ; b) Processor mode is switched to Handler
mode (from Thread mode)
199 00000042 ; c) Stack is Main stack (switched from Pro
cess stack)
200 00000042 ; d) OSTCBCur points to the OS_TCB of
the task to suspend
201 00000042 ; OSTCBHighRdy points to the OS_TCB of
the task to resume
202 00000042 ;
203 00000042 ; 4) Since PendSV is set to lowest priority in
the system (by OSStartHighRdy() above), we
204 00000042 ; know that it will only be run when no oth
er exception or interrupt is active, and
205 00000042 ; therefore safe to assume that context bei
ng switched out was using the process stack (PSP).
206 00000042 ;
207 00000042 ;Cortex-M3进入异常服务例程时,自动压栈了R0-R3,R12,LR(R14,
连接寄存器),PSR(程序状态寄存器)和PC(R15).并且在返回时自�
���
208 00000042 ;*******************************************************
*************************************************
209 00000042
210 00000042
211 00000042 PendSV_Handler
212 00000042 B672 CPSID I ; Prevent interrupt
ion during context
switch
213 00000044
214 00000044 ; PSP is process stack pointer 如果在用PSP堆栈,则可以忽�
员4婕拇嫫�,参考CM3权威中的双堆栈
215 00000044 F3EF 8009 MRS R0, PSP
216 00000048
217 00000048 B128 CBZ R0, PendSV_Handler_Nosave ; Ski
p register save the
first time
218 0000004A
219 0000004A 3820 SUBS R0, R0, #0x20 ; Save remaining
regs r4-11 on proce
ss stack
220 0000004C E880 0FF0 STM R0, {R4-R11}
221 00000050
222 00000050 490F LDR R1, =OSTCBCur ; OSTCBCur->OSTCB
StkPtr = SP;
223 00000052 6809 LDR R1, [R1]
224 00000054 6008 STR R0, [R1] ; R0 is SP of proce
ss being switched o
ut
225 00000056
226 00000056 ; At this point, entire context of process has been save
ARM Macro Assembler Page 7
d
227 00000056 PendSV_Handler_Nosave
228 00000056 B500 PUSH {R14} ; Save LR exc_retur
n value
229 00000058 480E LDR R0, =OSTaskSwHook
; OSTaskSwHook();
230 0000005A 4780 BLX R0
231 0000005C F85D EB04 POP {R14}
232 00000060
233 00000060 480D LDR R0, =OSPrioCur ; OSPrioCur = OS
PrioHighRdy;
234 00000062 490E LDR R1, =OSPrioHighRdy
235 00000064 780A LDRB R2, [R1]
236 00000066 7002 STRB R2, [R0]
237 00000068
238 00000068 4809 LDR R0, =OSTCBCur ; OSTCBCur = OST
CBHighRdy;
239 0000006A 490D LDR R1, =OSTCBHighRdy
240 0000006C 680A LDR R2, [R1]
241 0000006E 6002 STR R2, [R0]
242 00000070
243 00000070 6810 LDR R0, [R2] ; R0 is new process
SP; SP = OSTCBHigh
Rdy->OSTCBStkPtr;
244 00000072 E890 0FF0 LDM R0, {R4-R11} ; Restore r4-11 fr
om new process stac
k
245 00000076 3020 ADDS R0, R0, #0x20
246 00000078 F380 8809 MSR PSP, R0 ; Load PSP with new
process SP
247 0000007C F04E 0E04 ORR LR, LR, #0x04 ; Ensure exceptio
n return uses proce
ss stack
248 00000080 B662 CPSIE I
249 00000082 4770 BX LR ; Exception return
will restore remain
ing context
250 00000084
251 00000084 END
E000ED22
00000000
E000ED04
00000000
00000000
00000000
00000000
00000000
Command Line: --debug --xref --diag_suppress=9931 --cpu=Cortex-M4 --apcs=interw
ork --depend=.\out\os_cpu_a.d -o.\out\os_cpu_a.o -ID:\Keil_v515\ARM\RV31\INC -I
D:\Keil_v515\ARM\CMSIS\Include -ID:\Keil_v515\ARM\Inc\ST\STM32F4xx --predefine=
"__UVISION_VERSION SETA 515" --list=.\list\os_cpu_a.lst ..\User\uCOS-II\Ports\A
RM-Cortex-M3\RealView\os_cpu_a.asm
ARM Macro Assembler Page 1 Alphabetic symbol ordering
Relocatable symbols
.text 00000000
Symbol: .text
Definitions
At line 56 in file ..\User\uCOS-II\Ports\ARM-Cortex-M3\RealView\os_cpu_a.
asm
Uses
None
Comment: .text unused
OSCtxSw 0000002E
Symbol: OSCtxSw
Definitions
At line 150 in file ..\User\uCOS-II\Ports\ARM-Cortex-M3\RealView\os_cpu_a
.asm
Uses
At line 39 in file ..\User\uCOS-II\Ports\ARM-Cortex-M3\RealView\os_cpu_a.
asm
Comment: OSCtxSw used once
OSIntCtxSw 00000038
Symbol: OSIntCtxSw
Definitions
At line 165 in file ..\User\uCOS-II\Ports\ARM-Cortex-M3\RealView\os_cpu_a
.asm
Uses
At line 40 in file ..\User\uCOS-II\Ports\ARM-Cortex-M3\RealView\os_cpu_a.
asm
Comment: OSIntCtxSw used once
OSStartHang 0000002C
Symbol: OSStartHang
Definitions
At line 138 in file ..\User\uCOS-II\Ports\ARM-Cortex-M3\RealView\os_cpu_a
.asm
Uses
At line 139 in file ..\User\uCOS-II\Ports\ARM-Cortex-M3\RealView\os_cpu_a
.asm
Comment: OSStartHang used once
OSStartHighRdy 0000000E
Symbol: OSStartHighRdy
Definitions
At line 120 in file ..\User\uCOS-II\Ports\ARM-Cortex-M3\RealView\os_cpu_a
.asm
Uses
At line 38 in file ..\User\uCOS-II\Ports\ARM-Cortex-M3\RealView\os_cpu_a.
asm
Comment: OSStartHighRdy used once
OS_CPU_SR_Restore 00000008
Symbol: OS_CPU_SR_Restore
Definitions
At line 101 in file ..\User\uCOS-II\Ports\ARM-Cortex-M3\RealView\os_cpu_a
.asm
Uses
At line 37 in file ..\User\uCOS-II\Ports\ARM-Cortex-M3\RealView\os_cpu_a.
asm
Comment: OS_CPU_SR_Restore used once
ARM Macro Assembler Page 2 Alphabetic symbol ordering
Relocatable symbols
OS_CPU_SR_Save 00000000
Symbol: OS_CPU_SR_Save
Definitions
At line 94 in file ..\User\uCOS-II\Ports\ARM-Cortex-M3\RealView\os_cpu_a.
asm
Uses
At line 36 in file ..\User\uCOS-II\Ports\ARM-Cortex-M3\RealView\os_cpu_a.
asm
Comment: OS_CPU_SR_Save used once
PendSV_Handler 00000042
Symbol: PendSV_Handler
Definitions
At line 211 in file ..\User\uCOS-II\Ports\ARM-Cortex-M3\RealView\os_cpu_a
.asm
Uses
At line 41 in file ..\User\uCOS-II\Ports\ARM-Cortex-M3\RealView\os_cpu_a.
asm
Comment: PendSV_Handler used once
PendSV_Handler_Nosave 00000056
Symbol: PendSV_Handler_Nosave
Definitions
At line 227 in file ..\User\uCOS-II\Ports\ARM-Cortex-M3\RealView\os_cpu_a
.asm
Uses
At line 217 in file ..\User\uCOS-II\Ports\ARM-Cortex-M3\RealView\os_cpu_a
.asm
Comment: PendSV_Handler_Nosave used once
9 symbols
ARM Macro Assembler Page 1 Alphabetic symbol ordering
Absolute symbols
NVIC_INT_CTRL E000ED04
Symbol: NVIC_INT_CTRL
Definitions
At line 47 in file ..\User\uCOS-II\Ports\ARM-Cortex-M3\RealView\os_cpu_a.
asm
Uses
At line 132 in file ..\User\uCOS-II\Ports\ARM-Cortex-M3\RealView\os_cpu_a
.asm
At line 151 in file ..\User\uCOS-II\Ports\ARM-Cortex-M3\RealView\os_cpu_a
.asm
At line 166 in file ..\User\uCOS-II\Ports\ARM-Cortex-M3\RealView\os_cpu_a
.asm
NVIC_PENDSVSET 10000000
Symbol: NVIC_PENDSVSET
Definitions
At line 50 in file ..\User\uCOS-II\Ports\ARM-Cortex-M3\RealView\os_cpu_a.
asm
Uses
At line 133 in file ..\User\uCOS-II\Ports\ARM-Cortex-M3\RealView\os_cpu_a
.asm
At line 152 in file ..\User\uCOS-II\Ports\ARM-Cortex-M3\RealView\os_cpu_a
.asm
At line 167 in file ..\User\uCOS-II\Ports\ARM-Cortex-M3\RealView\os_cpu_a
.asm
NVIC_PENDSV_PRI 000000FF
Symbol: NVIC_PENDSV_PRI
Definitions
At line 49 in file ..\User\uCOS-II\Ports\ARM-Cortex-M3\RealView\os_cpu_a.
asm
Uses
At line 122 in file ..\User\uCOS-II\Ports\ARM-Cortex-M3\RealView\os_cpu_a
.asm
Comment: NVIC_PENDSV_PRI used once
NVIC_SYSPRI14 E000ED22
Symbol: NVIC_SYSPRI14
Definitions
At line 48 in file ..\User\uCOS-II\Ports\ARM-Cortex-M3\RealView\os_cpu_a.
asm
Uses
At line 121 in file ..\User\uCOS-II\Ports\ARM-Cortex-M3\RealView\os_cpu_a
.asm
Comment: NVIC_SYSPRI14 used once
4 symbols
ARM Macro Assembler Page 1 Alphabetic symbol ordering
External symbols
OSIntExit 00000000
Symbol: OSIntExit
Definitions
At line 32 in file ..\User\uCOS-II\Ports\ARM-Cortex-M3\RealView\os_cpu_a.
asm
Uses
None
Comment: OSIntExit unused
OSIntNesting 00000000
Symbol: OSIntNesting
Definitions
At line 31 in file ..\User\uCOS-II\Ports\ARM-Cortex-M3\RealView\os_cpu_a.
asm
Uses
None
Comment: OSIntNesting unused
OSPrioCur 00000000
Symbol: OSPrioCur
Definitions
At line 27 in file ..\User\uCOS-II\Ports\ARM-Cortex-M3\RealView\os_cpu_a.
asm
Uses
At line 233 in file ..\User\uCOS-II\Ports\ARM-Cortex-M3\RealView\os_cpu_a
.asm
Comment: OSPrioCur used once
OSPrioHighRdy 00000000
Symbol: OSPrioHighRdy
Definitions
At line 28 in file ..\User\uCOS-II\Ports\ARM-Cortex-M3\RealView\os_cpu_a.
asm
Uses
At line 234 in file ..\User\uCOS-II\Ports\ARM-Cortex-M3\RealView\os_cpu_a
.asm
Comment: OSPrioHighRdy used once
OSRunning 00000000
Symbol: OSRunning
Definitions
At line 26 in file ..\User\uCOS-II\Ports\ARM-Cortex-M3\RealView\os_cpu_a.
asm
Uses
At line 128 in file ..\User\uCOS-II\Ports\ARM-Cortex-M3\RealView\os_cpu_a
.asm
Comment: OSRunning used once
OSTCBCur 00000000
Symbol: OSTCBCur
Definitions
At line 29 in file ..\User\uCOS-II\Ports\ARM-Cortex-M3\RealView\os_cpu_a.
asm
Uses
At line 222 in file ..\User\uCOS-II\Ports\ARM-Cortex-M3\RealView\os_cpu_a
.asm
At line 238 in file ..\User\uCOS-II\Ports\ARM-Cortex-M3\RealView\os_cpu_a
.asm
ARM Macro Assembler Page 2 Alphabetic symbol ordering
External symbols
OSTCBHighRdy 00000000
Symbol: OSTCBHighRdy
Definitions
At line 30 in file ..\User\uCOS-II\Ports\ARM-Cortex-M3\RealView\os_cpu_a.
asm
Uses
At line 239 in file ..\User\uCOS-II\Ports\ARM-Cortex-M3\RealView\os_cpu_a
.asm
Comment: OSTCBHighRdy used once
OSTaskSwHook 00000000
Symbol: OSTaskSwHook
Definitions
At line 33 in file ..\User\uCOS-II\Ports\ARM-Cortex-M3\RealView\os_cpu_a.
asm
Uses
At line 229 in file ..\User\uCOS-II\Ports\ARM-Cortex-M3\RealView\os_cpu_a
.asm
Comment: OSTaskSwHook used once
8 symbols
354 symbols in table
@@ -0,0 +1,2 @@
[EXTDLL]
Count=0
@@ -0,0 +1,126 @@
<html>
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<pre>
<h1>µVision Build Log</h1>
<h2>Tool Versions:</h2>
IDE-Version: ¦ÌVision V5.15
Copyright (C) 2015 ARM Ltd and ARM Germany GmbH. All rights reserved.
License Information: sky Sky123.Org, Sky123.Org, LIC=P6F63-A5JSF-NTD3G-V0HZ9-EFB8I-J7I5M
Tool Versions:
Toolchain: MDK-ARM Professional Version: 5.15.0
Toolchain Path: D:\Keil_v515\ARM\ARMCC\Bin
C Compiler: Armcc.exe V5.05 update 2 (build 169)
Assembler: Armasm.exe V5.05 update 2 (build 169)
Linker/Locator: ArmLink.exe V5.05 update 2 (build 169)
Library Manager: ArmAr.exe V5.05 update 2 (build 169)
Hex Converter: FromElf.exe V5.05 update 2 (build 169)
CPU DLL: SARMCM3.DLL V5.15.0
Dialog DLL: DCM.DLL V1.13.2.0
Target DLL: UL2CM3.DLL V1.155.8.0
Dialog DLL: TCM.DLL V1.14.5.0
<h2>Project:</h2>
C:\Users\Administrator\Desktop\EVK407I-Demo\uCOSII2.91+UCGUI3.90A\MDK_Project\Project.uvproj
Project File Date: 08/02/2013
<h2>Output:</h2>
*** Using Compiler 'V5.05 update 2 (build 169)', folder: 'D:\Keil_v515\ARM\ARMCC\Bin'
Build target 'Target 1'
compiling main.c...
compiling uctsk_Task.c...
compiling uctsk_OSView.c...
compiling stm32f4xx_it.c...
compiling TouchPanel.c...
assembling startup_stm32f4xx.s...
compiling system_stm32f4xx.c...
compiling misc.c...
compiling stm32f4xx_adc.c...
compiling stm32f4xx_can.c...
compiling stm32f4xx_crc.c...
compiling stm32f4xx_cryp.c...
compiling stm32f4xx_cryp_aes.c...
compiling stm32f4xx_cryp_des.c...
compiling stm32f4xx_cryp_tdes.c...
compiling stm32f4xx_dac.c...
compiling stm32f4xx_dbgmcu.c...
compiling stm32f4xx_dcmi.c...
compiling stm32f4xx_dma.c...
compiling stm32f4xx_exti.c...
compiling stm32f4xx_flash.c...
compiling stm32f4xx_fsmc.c...
compiling stm32f4xx_gpio.c...
compiling stm32f4xx_hash.c...
compiling stm32f4xx_hash_md5.c...
compiling stm32f4xx_hash_sha1.c...
compiling stm32f4xx_i2c.c...
compiling stm32f4xx_iwdg.c...
compiling stm32f4xx_pwr.c...
compiling stm32f4xx_rcc.c...
compiling stm32f4xx_rng.c...
compiling stm32f4xx_rtc.c...
compiling stm32f4xx_sdio.c...
compiling stm32f4xx_spi.c...
compiling stm32f4xx_syscfg.c...
compiling stm32f4xx_tim.c...
compiling stm32f4xx_usart.c...
compiling stm32f4xx_wwdg.c...
compiling os_cpu_c.c...
compiling os_dbg.c...
assembling os_cpu_a.asm...
compiling os_core.c...
compiling os_flag.c...
compiling os_mbox.c...
compiling os_mem.c...
compiling os_mutex.c...
compiling os_q.c...
compiling os_sem.c...
compiling os_task.c...
compiling os_time.c...
compiling os_tmr.c...
compiling OS_AppHooks.c...
compiling cpu_c.c...
assembling cpu_a.asm...
compiling lib_mem.c...
compiling lib_str.c...
assembling lib_mem_a.asm...
compiling os_view.c...
compiling os_viewc.c...
compiling GUI_X_uCOS.c...
compiling GUI_X_Touch.c...
compiling AsciiLib.c...
compiling GLCD.c...
compiling GLCD_UCGUI.c...
compiling GUIDEMO.c...
compiling GUIDEMO_Automotive.c...
compiling GUIDEMO_Bitmap4bpp.c...
compiling GUIDEMO_Bitmap.c...
compiling GUIDEMO_Circle.c...
compiling GUIDEMO_ColorBar.c...
compiling GUIDEMO_ColorList.c...
compiling GUIDEMO_Cursor.c...
compiling GUIDEMO_Dialog.c...
compiling GUIDEMO_Font.c...
compiling GUIDEMO_FrameWin.c...
compiling GUIDEMO_Graph.c...
compiling GUIDEMO_HardwareInfo.c...
compiling GUIDEMO_Intro.c...
compiling GUIDEMO_LUT.c...
compiling GUIDEMO_MemDevB.c...
compiling GUIDEMO_Messagebox.c...
compiling GUIDEMO_Navi.c...
compiling GUIDEMO_Polygon.c...
compiling GUIDEMO_ProgBar.c...
compiling GUIDEMO_Speed.c...
compiling GUIDEMO_Touch.c...
compiling GUIDEMO_WM.c...
compiling MainTask.c...
compiling MicriumLogo.c...
compiling MicriumLogoWRed.c...
linking...
Program Size: Code=98594 RO-data=142938 RW-data=1080 ZI-data=26512
FromELF: creating hex file...
".\Out\Project.axf" - 0 Error(s), 0 Warning(s).
</pre>
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File diff suppressed because it is too large Load Diff
File diff suppressed because it is too large Load Diff
File diff suppressed because it is too large Load Diff