# This is an mozg_f7_v1 board with a single STM32F746VGTx chip.
# Generated by System Workbench for STM32

source [find interface/stlink-v2.cfg]

set WORKAREASIZE 0x50000
transport select "hla_swd"


source [find target/stm32f7x.cfg]

# use hardware reset, connect under reset
reset_config srst_only srst_nogate