*
This commit is contained in:
@@ -0,0 +1,38 @@
|
||||
## Basc gates
|
||||
* [74LS00](74LS00.pdf) - Quad 2-input positive-NAND gates []
|
||||
* [74LS02](74LS02.pdf) - Quad 2-input positive-NOR gates
|
||||
* [74LS04](74LS04.pdf) - 6 inverters
|
||||
* [74LS08](74LS08.pdf) - Quad 2-Input AND Gates
|
||||
* [74LS15](74LS15.pdf) - TRIPLE 3-INPUT POSITIVE-AND GATES WITH OPEN-COLLECTOR OUTPUTS
|
||||
* [74LS32](74LS32.pdf) - Quad 2-input positive-OR gates
|
||||
* [74LS86](74LS86.pdf) - Quad 2-input XOR gates
|
||||
|
||||
## Latches
|
||||
74LS107 - Dual Negative-EdgeTriggered Master-Slave J-K Flip-Flops with Clear and Complementary Outputs
|
||||
74LS273 - OCTAL D-TYPE FLIP-FLOP WITH CLEAR
|
||||
74HC573 - Octal D-type transparent latch; 3-state
|
||||
|
||||
## Registers
|
||||
74LS173 - 4-BIT D-TYPE REGISTERS WITH 3-STATE OUTPUTS
|
||||
|
||||
## RAM
|
||||
74F189 - 64-bit TTL bipolar RAM, inverting (3-State)
|
||||
|
||||
## Transcievers
|
||||
74HC245 - OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
|
||||
|
||||
## Shift registers
|
||||
74HC595 - 8-bit serial-in, serial or parallel-outshift register with output latches; 3-state
|
||||
|
||||
## Demultiplexers
|
||||
74LS138 - 3 line to 8 line demultiplexer
|
||||
74LS139 - 2 line to 4 line demultiplexer
|
||||
|
||||
## Counters
|
||||
74LS161 - 4-BIT BINARY COUNTER
|
||||
|
||||
## ALU
|
||||
74LS181 - ALU
|
||||
|
||||
## Adders
|
||||
74LS283 - 4-bit binary full adder with fast carry
|
||||
Reference in New Issue
Block a user